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reference, declaration → definition
definition → references, declarations, derived classes, virtual overrides
reference to multiple definitions → definitions
unreferenced
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References
gen/lib/Target/AArch64/AArch64GenAsmMatcher.inc10901 case MCK_SVEVectorList264: {
12221 case MCK_SVEVectorList264: return "MCK_SVEVectorList264";
15377 { 1983 /* ld2d */, AArch64::LD2D_IMM, Convert__SVEVectorList2641_0__SVEPredicate3bAnyReg1_1__Reg1_5__imm_95_0, AMFBS_HasSVE, { MCK_SVEVectorList264, MCK_SVEPredicate3bAnyReg, MCK__47_, MCK_z, MCK__91_, MCK_GPR64sp, MCK__93_ }, },
15378 { 1983 /* ld2d */, AArch64::LD2D, Convert__SVEVectorList2641_0__SVEPredicate3bAnyReg1_1__Reg1_5__GPR64NoXZRshifted641_6, AMFBS_HasSVE, { MCK_SVEVectorList264, MCK_SVEPredicate3bAnyReg, MCK__47_, MCK_z, MCK__91_, MCK_GPR64sp, MCK_GPR64NoXZRshifted64, MCK__93_ }, },
15379 { 1983 /* ld2d */, AArch64::LD2D_IMM, Convert__SVEVectorList2641_0__SVEPredicate3bAnyReg1_1__Reg1_5__SImm4s21_6, AMFBS_HasSVE, { MCK_SVEVectorList264, MCK_SVEPredicate3bAnyReg, MCK__47_, MCK_z, MCK__91_, MCK_GPR64sp, MCK_SImm4s2, MCK_mul, MCK_vl, MCK__93_ }, },
17414 { 4563 /* splice */, AArch64::SPLICE_ZPZZ_D, Convert__SVEVectorDReg1_0__SVEPredicate3bAnyReg1_1__SVEVectorList2641_2, AMFBS_HasSVE2, { MCK_SVEVectorDReg, MCK_SVEPredicate3bAnyReg, MCK_SVEVectorList264 }, },
18478 { 5267 /* st2d */, AArch64::ST2D_IMM, Convert__SVEVectorList2641_0__SVEPredicate3bAnyReg1_1__Reg1_3__imm_95_0, AMFBS_HasSVE, { MCK_SVEVectorList264, MCK_SVEPredicate3bAnyReg, MCK__91_, MCK_GPR64sp, MCK__93_ }, },
18479 { 5267 /* st2d */, AArch64::ST2D, Convert__SVEVectorList2641_0__SVEPredicate3bAnyReg1_1__Reg1_3__GPR64NoXZRshifted641_4, AMFBS_HasSVE, { MCK_SVEVectorList264, MCK_SVEPredicate3bAnyReg, MCK__91_, MCK_GPR64sp, MCK_GPR64NoXZRshifted64, MCK__93_ }, },
18480 { 5267 /* st2d */, AArch64::ST2D_IMM, Convert__SVEVectorList2641_0__SVEPredicate3bAnyReg1_1__Reg1_3__SImm4s21_4, AMFBS_HasSVE, { MCK_SVEVectorList264, MCK_SVEPredicate3bAnyReg, MCK__91_, MCK_GPR64sp, MCK_SImm4s2, MCK_mul, MCK_vl, MCK__93_ }, },
19084 { 6111 /* tbl */, AArch64::TBL_ZZZZ_D, Convert__SVEVectorDReg1_0__SVEVectorList2641_1__SVEVectorDReg1_2, AMFBS_HasSVE2, { MCK_SVEVectorDReg, MCK_SVEVectorList264, MCK_SVEVectorDReg }, },
22735 { 1983 /* ld2d */, AArch64::LD2D_IMM, Convert__SVEVectorList2641_0__SVEPredicate3bAnyReg1_1__Reg1_5__imm_95_0, AMFBS_HasSVE, { MCK_SVEVectorList264, MCK_SVEPredicate3bAnyReg, MCK__47_, MCK_z, MCK__91_, MCK_GPR64sp, MCK__93_ }, },
22736 { 1983 /* ld2d */, AArch64::LD2D, Convert__SVEVectorList2641_0__SVEPredicate3bAnyReg1_1__Reg1_5__GPR64NoXZRshifted641_6, AMFBS_HasSVE, { MCK_SVEVectorList264, MCK_SVEPredicate3bAnyReg, MCK__47_, MCK_z, MCK__91_, MCK_GPR64sp, MCK_GPR64NoXZRshifted64, MCK__93_ }, },
22737 { 1983 /* ld2d */, AArch64::LD2D_IMM, Convert__SVEVectorList2641_0__SVEPredicate3bAnyReg1_1__Reg1_5__SImm4s21_6, AMFBS_HasSVE, { MCK_SVEVectorList264, MCK_SVEPredicate3bAnyReg, MCK__47_, MCK_z, MCK__91_, MCK_GPR64sp, MCK_SImm4s2, MCK_mul, MCK_vl, MCK__93_ }, },
24772 { 4563 /* splice */, AArch64::SPLICE_ZPZZ_D, Convert__SVEVectorDReg1_0__SVEPredicate3bAnyReg1_1__SVEVectorList2641_2, AMFBS_HasSVE2, { MCK_SVEVectorDReg, MCK_SVEPredicate3bAnyReg, MCK_SVEVectorList264 }, },
25836 { 5267 /* st2d */, AArch64::ST2D_IMM, Convert__SVEVectorList2641_0__SVEPredicate3bAnyReg1_1__Reg1_3__imm_95_0, AMFBS_HasSVE, { MCK_SVEVectorList264, MCK_SVEPredicate3bAnyReg, MCK__91_, MCK_GPR64sp, MCK__93_ }, },
25837 { 5267 /* st2d */, AArch64::ST2D, Convert__SVEVectorList2641_0__SVEPredicate3bAnyReg1_1__Reg1_3__GPR64NoXZRshifted641_4, AMFBS_HasSVE, { MCK_SVEVectorList264, MCK_SVEPredicate3bAnyReg, MCK__91_, MCK_GPR64sp, MCK_GPR64NoXZRshifted64, MCK__93_ }, },
25838 { 5267 /* st2d */, AArch64::ST2D_IMM, Convert__SVEVectorList2641_0__SVEPredicate3bAnyReg1_1__Reg1_3__SImm4s21_4, AMFBS_HasSVE, { MCK_SVEVectorList264, MCK_SVEPredicate3bAnyReg, MCK__91_, MCK_GPR64sp, MCK_SImm4s2, MCK_mul, MCK_vl, MCK__93_ }, },
26442 { 6111 /* tbl */, AArch64::TBL_ZZZZ_D, Convert__SVEVectorDReg1_0__SVEVectorList2641_1__SVEVectorDReg1_2, AMFBS_HasSVE2, { MCK_SVEVectorDReg, MCK_SVEVectorList264, MCK_SVEVectorDReg }, },
32691 { 1983 /* ld2d */, 1 /* 0 */, MCK_SVEVectorList264, AMFBS_HasSVE },
32693 { 1983 /* ld2d */, 1 /* 0 */, MCK_SVEVectorList264, AMFBS_HasSVE },
32696 { 1983 /* ld2d */, 1 /* 0 */, MCK_SVEVectorList264, AMFBS_HasSVE },
32699 { 1983 /* ld2d */, 1 /* 0 */, MCK_SVEVectorList264, AMFBS_HasSVE },
32701 { 1983 /* ld2d */, 1 /* 0 */, MCK_SVEVectorList264, AMFBS_HasSVE },
32703 { 1983 /* ld2d */, 1 /* 0 */, MCK_SVEVectorList264, AMFBS_HasSVE },
36534 { 4563 /* splice */, 4 /* 2 */, MCK_SVEVectorList264, AMFBS_HasSVE2 },
36537 { 4563 /* splice */, 4 /* 2 */, MCK_SVEVectorList264, AMFBS_HasSVE2 },
38459 { 5267 /* st2d */, 1 /* 0 */, MCK_SVEVectorList264, AMFBS_HasSVE },
38461 { 5267 /* st2d */, 1 /* 0 */, MCK_SVEVectorList264, AMFBS_HasSVE },
38464 { 5267 /* st2d */, 1 /* 0 */, MCK_SVEVectorList264, AMFBS_HasSVE },
38467 { 5267 /* st2d */, 1 /* 0 */, MCK_SVEVectorList264, AMFBS_HasSVE },
38469 { 5267 /* st2d */, 1 /* 0 */, MCK_SVEVectorList264, AMFBS_HasSVE },
38471 { 5267 /* st2d */, 1 /* 0 */, MCK_SVEVectorList264, AMFBS_HasSVE },
39121 { 6111 /* tbl */, 2 /* 1 */, MCK_SVEVectorList264, AMFBS_HasSVE2 },
39123 { 6111 /* tbl */, 2 /* 1 */, MCK_SVEVectorList264, AMFBS_HasSVE2 },
40823 case MCK_SVEVectorList264: