reference, declaration → definition definition → references, declarations, derived classes, virtual overrides reference to multiple definitions → definitions unreferenced |
10710 case MCK_SVEVector3bSReg: { 12196 case MCK_SVEVector3bSReg: return "MCK_SVEVector3bSReg"; 14243 { 1455 /* fmla */, AArch64::FMLA_ZZZI_S, Convert__SVEVectorSReg1_0__Tie0_1_1__SVEVectorSReg1_1__SVEVector3bSReg1_2__IndexRange0_31_3, AMFBS_HasSVE, { MCK_SVEVectorSReg, MCK_SVEVectorSReg, MCK_SVEVector3bSReg, MCK_IndexRange0_3 }, }, 14274 { 1487 /* fmls */, AArch64::FMLS_ZZZI_S, Convert__SVEVectorSReg1_0__Tie0_1_1__SVEVectorSReg1_1__SVEVector3bSReg1_2__IndexRange0_31_3, AMFBS_HasSVE, { MCK_SVEVectorSReg, MCK_SVEVectorSReg, MCK_SVEVector3bSReg, MCK_IndexRange0_3 }, }, 14353 { 1535 /* fmul */, AArch64::FMUL_ZZZI_S, Convert__SVEVectorSReg1_0__SVEVectorSReg1_1__SVEVector3bSReg1_2__IndexRange0_31_3, AMFBS_HasSVE, { MCK_SVEVectorSReg, MCK_SVEVectorSReg, MCK_SVEVector3bSReg, MCK_IndexRange0_3 }, }, 16482 { 3343 /* mla */, AArch64::MLA_ZZZI_S, Convert__SVEVectorSReg1_0__Tie0_1_1__SVEVectorSReg1_1__SVEVector3bSReg1_2__IndexRange0_31_3, AMFBS_HasSVE2, { MCK_SVEVectorSReg, MCK_SVEVectorSReg, MCK_SVEVector3bSReg, MCK_IndexRange0_3 }, }, 16499 { 3347 /* mls */, AArch64::MLS_ZZZI_S, Convert__SVEVectorSReg1_0__Tie0_1_1__SVEVectorSReg1_1__SVEVector3bSReg1_2__IndexRange0_31_3, AMFBS_HasSVE2, { MCK_SVEVectorSReg, MCK_SVEVectorSReg, MCK_SVEVector3bSReg, MCK_IndexRange0_3 }, }, 16684 { 3410 /* mul */, AArch64::MUL_ZZZI_S, Convert__SVEVectorSReg1_0__SVEVectorSReg1_1__SVEVector3bSReg1_2__IndexRange0_31_3, AMFBS_HasSVE2, { MCK_SVEVectorSReg, MCK_SVEVectorSReg, MCK_SVEVector3bSReg, MCK_IndexRange0_3 }, }, 17566 { 4714 /* sqdmulh */, AArch64::SQDMULH_ZZZI_S, Convert__SVEVectorSReg1_0__SVEVectorSReg1_1__SVEVector3bSReg1_2__IndexRange0_31_3, AMFBS_HasSVE2, { MCK_SVEVectorSReg, MCK_SVEVectorSReg, MCK_SVEVector3bSReg, MCK_IndexRange0_3 }, }, 17675 { 4808 /* sqrdmlah */, AArch64::SQRDMLAH_ZZZI_S, Convert__SVEVectorSReg1_0__Tie0_1_1__SVEVectorSReg1_1__SVEVector3bSReg1_2__IndexRange0_31_3, AMFBS_HasSVE2, { MCK_SVEVectorSReg, MCK_SVEVectorSReg, MCK_SVEVector3bSReg, MCK_IndexRange0_3 }, }, 17694 { 4817 /* sqrdmlsh */, AArch64::SQRDMLSH_ZZZI_S, Convert__SVEVectorSReg1_0__Tie0_1_1__SVEVectorSReg1_1__SVEVector3bSReg1_2__IndexRange0_31_3, AMFBS_HasSVE2, { MCK_SVEVectorSReg, MCK_SVEVectorSReg, MCK_SVEVector3bSReg, MCK_IndexRange0_3 }, }, 17713 { 4826 /* sqrdmulh */, AArch64::SQRDMULH_ZZZI_S, Convert__SVEVectorSReg1_0__SVEVectorSReg1_1__SVEVector3bSReg1_2__IndexRange0_31_3, AMFBS_HasSVE2, { MCK_SVEVectorSReg, MCK_SVEVectorSReg, MCK_SVEVector3bSReg, MCK_IndexRange0_3 }, }, 21606 { 1455 /* fmla */, AArch64::FMLA_ZZZI_S, Convert__SVEVectorSReg1_0__Tie0_1_1__SVEVectorSReg1_1__SVEVector3bSReg1_2__IndexRange0_31_3, AMFBS_HasSVE, { MCK_SVEVectorSReg, MCK_SVEVectorSReg, MCK_SVEVector3bSReg, MCK_IndexRange0_3 }, }, 21637 { 1487 /* fmls */, AArch64::FMLS_ZZZI_S, Convert__SVEVectorSReg1_0__Tie0_1_1__SVEVectorSReg1_1__SVEVector3bSReg1_2__IndexRange0_31_3, AMFBS_HasSVE, { MCK_SVEVectorSReg, MCK_SVEVectorSReg, MCK_SVEVector3bSReg, MCK_IndexRange0_3 }, }, 21716 { 1535 /* fmul */, AArch64::FMUL_ZZZI_S, Convert__SVEVectorSReg1_0__SVEVectorSReg1_1__SVEVector3bSReg1_2__IndexRange0_31_3, AMFBS_HasSVE, { MCK_SVEVectorSReg, MCK_SVEVectorSReg, MCK_SVEVector3bSReg, MCK_IndexRange0_3 }, }, 23846 { 3343 /* mla */, AArch64::MLA_ZZZI_S, Convert__SVEVectorSReg1_0__Tie0_1_1__SVEVectorSReg1_1__SVEVector3bSReg1_2__IndexRange0_31_3, AMFBS_HasSVE2, { MCK_SVEVectorSReg, MCK_SVEVectorSReg, MCK_SVEVector3bSReg, MCK_IndexRange0_3 }, }, 23863 { 3347 /* mls */, AArch64::MLS_ZZZI_S, Convert__SVEVectorSReg1_0__Tie0_1_1__SVEVectorSReg1_1__SVEVector3bSReg1_2__IndexRange0_31_3, AMFBS_HasSVE2, { MCK_SVEVectorSReg, MCK_SVEVectorSReg, MCK_SVEVector3bSReg, MCK_IndexRange0_3 }, }, 24048 { 3410 /* mul */, AArch64::MUL_ZZZI_S, Convert__SVEVectorSReg1_0__SVEVectorSReg1_1__SVEVector3bSReg1_2__IndexRange0_31_3, AMFBS_HasSVE2, { MCK_SVEVectorSReg, MCK_SVEVectorSReg, MCK_SVEVector3bSReg, MCK_IndexRange0_3 }, }, 24928 { 4714 /* sqdmulh */, AArch64::SQDMULH_ZZZI_S, Convert__SVEVectorSReg1_0__SVEVectorSReg1_1__SVEVector3bSReg1_2__IndexRange0_31_3, AMFBS_HasSVE2, { MCK_SVEVectorSReg, MCK_SVEVectorSReg, MCK_SVEVector3bSReg, MCK_IndexRange0_3 }, }, 25037 { 4808 /* sqrdmlah */, AArch64::SQRDMLAH_ZZZI_S, Convert__SVEVectorSReg1_0__Tie0_1_1__SVEVectorSReg1_1__SVEVector3bSReg1_2__IndexRange0_31_3, AMFBS_HasSVE2, { MCK_SVEVectorSReg, MCK_SVEVectorSReg, MCK_SVEVector3bSReg, MCK_IndexRange0_3 }, }, 25056 { 4817 /* sqrdmlsh */, AArch64::SQRDMLSH_ZZZI_S, Convert__SVEVectorSReg1_0__Tie0_1_1__SVEVectorSReg1_1__SVEVector3bSReg1_2__IndexRange0_31_3, AMFBS_HasSVE2, { MCK_SVEVectorSReg, MCK_SVEVectorSReg, MCK_SVEVector3bSReg, MCK_IndexRange0_3 }, }, 25075 { 4826 /* sqrdmulh */, AArch64::SQRDMULH_ZZZI_S, Convert__SVEVectorSReg1_0__SVEVectorSReg1_1__SVEVector3bSReg1_2__IndexRange0_31_3, AMFBS_HasSVE2, { MCK_SVEVectorSReg, MCK_SVEVectorSReg, MCK_SVEVector3bSReg, MCK_IndexRange0_3 }, }, 30287 { 1455 /* fmla */, 4 /* 2 */, MCK_SVEVector3bSReg, AMFBS_HasSVE }, 30289 { 1455 /* fmla */, 4 /* 2 */, MCK_SVEVector3bSReg, AMFBS_HasSVE }, 30331 { 1487 /* fmls */, 4 /* 2 */, MCK_SVEVector3bSReg, AMFBS_HasSVE }, 30333 { 1487 /* fmls */, 4 /* 2 */, MCK_SVEVector3bSReg, AMFBS_HasSVE }, 30457 { 1535 /* fmul */, 4 /* 2 */, MCK_SVEVector3bSReg, AMFBS_HasSVE }, 30459 { 1535 /* fmul */, 4 /* 2 */, MCK_SVEVector3bSReg, AMFBS_HasSVE }, 34897 { 3343 /* mla */, 4 /* 2 */, MCK_SVEVector3bSReg, AMFBS_HasSVE2 }, 34899 { 3343 /* mla */, 4 /* 2 */, MCK_SVEVector3bSReg, AMFBS_HasSVE2 }, 34925 { 3347 /* mls */, 4 /* 2 */, MCK_SVEVector3bSReg, AMFBS_HasSVE2 }, 34927 { 3347 /* mls */, 4 /* 2 */, MCK_SVEVector3bSReg, AMFBS_HasSVE2 }, 35191 { 3410 /* mul */, 4 /* 2 */, MCK_SVEVector3bSReg, AMFBS_HasSVE2 }, 35193 { 3410 /* mul */, 4 /* 2 */, MCK_SVEVector3bSReg, AMFBS_HasSVE2 }, 36891 { 4714 /* sqdmulh */, 4 /* 2 */, MCK_SVEVector3bSReg, AMFBS_HasSVE2 }, 36893 { 4714 /* sqdmulh */, 4 /* 2 */, MCK_SVEVector3bSReg, AMFBS_HasSVE2 }, 37125 { 4808 /* sqrdmlah */, 4 /* 2 */, MCK_SVEVector3bSReg, AMFBS_HasSVE2 }, 37127 { 4808 /* sqrdmlah */, 4 /* 2 */, MCK_SVEVector3bSReg, AMFBS_HasSVE2 }, 37145 { 4817 /* sqrdmlsh */, 4 /* 2 */, MCK_SVEVector3bSReg, AMFBS_HasSVE2 }, 37147 { 4817 /* sqrdmlsh */, 4 /* 2 */, MCK_SVEVector3bSReg, AMFBS_HasSVE2 }, 37165 { 4826 /* sqrdmulh */, 4 /* 2 */, MCK_SVEVector3bSReg, AMFBS_HasSVE2 }, 37167 { 4826 /* sqrdmulh */, 4 /* 2 */, MCK_SVEVector3bSReg, AMFBS_HasSVE2 }, 40793 case MCK_SVEVector3bSReg: