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reference, declaration → definition
definition → references, declarations, derived classes, virtual overrides
reference to multiple definitions → definitions
unreferenced
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References
gen/lib/Target/AArch64/AArch64GenAsmMatcher.inc 9635 case MCK_SVECpyImm8: {
12061 case MCK_SVECpyImm8: return "MCK_SVECpyImm8";
13391 { 787 /* cpy */, AArch64::CPY_ZPmI_B, Convert__SVEVectorBReg1_0__Tie0_1_1__SVEPredicateAnyReg1_1__SVECpyImm82_4, AMFBS_HasSVE, { MCK_SVEVectorBReg, MCK_SVEPredicateAnyReg, MCK__47_, MCK_m, MCK_SVECpyImm8 }, },
13392 { 787 /* cpy */, AArch64::CPY_ZPzI_B, Convert__SVEVectorBReg1_0__SVEPredicateAnyReg1_1__SVECpyImm82_4, AMFBS_HasSVE, { MCK_SVEVectorBReg, MCK_SVEPredicateAnyReg, MCK__47_, MCK_z, MCK_SVECpyImm8 }, },
13465 { 962 /* dup */, AArch64::DUP_ZI_B, Convert__SVEVectorBReg1_0__SVECpyImm82_1, AMFBS_HasSVE, { MCK_SVEVectorBReg, MCK_SVECpyImm8 }, },
16553 { 3356 /* mov */, AArch64::DUP_ZI_B, Convert__SVEVectorBReg1_0__SVECpyImm82_1, AMFBS_HasSVE, { MCK_SVEVectorBReg, MCK_SVECpyImm8 }, },
16597 { 3356 /* mov */, AArch64::CPY_ZPmI_B, Convert__SVEVectorBReg1_0__Tie0_1_1__SVEPredicateAnyReg1_1__SVECpyImm82_4, AMFBS_HasSVE, { MCK_SVEVectorBReg, MCK_SVEPredicateAnyReg, MCK__47_, MCK_m, MCK_SVECpyImm8 }, },
16599 { 3356 /* mov */, AArch64::CPY_ZPzI_B, Convert__SVEVectorBReg1_0__SVEPredicateAnyReg1_1__SVECpyImm82_4, AMFBS_HasSVE, { MCK_SVEVectorBReg, MCK_SVEPredicateAnyReg, MCK__47_, MCK_z, MCK_SVECpyImm8 }, },
20749 { 787 /* cpy */, AArch64::CPY_ZPmI_B, Convert__SVEVectorBReg1_0__Tie0_1_1__SVEPredicateAnyReg1_1__SVECpyImm82_4, AMFBS_HasSVE, { MCK_SVEVectorBReg, MCK_SVEPredicateAnyReg, MCK__47_, MCK_m, MCK_SVECpyImm8 }, },
20750 { 787 /* cpy */, AArch64::CPY_ZPzI_B, Convert__SVEVectorBReg1_0__SVEPredicateAnyReg1_1__SVECpyImm82_4, AMFBS_HasSVE, { MCK_SVEVectorBReg, MCK_SVEPredicateAnyReg, MCK__47_, MCK_z, MCK_SVECpyImm8 }, },
20823 { 962 /* dup */, AArch64::DUP_ZI_B, Convert__SVEVectorBReg1_0__SVECpyImm82_1, AMFBS_HasSVE, { MCK_SVEVectorBReg, MCK_SVECpyImm8 }, },
23911 { 3356 /* mov */, AArch64::DUP_ZI_B, Convert__SVEVectorBReg1_0__SVECpyImm82_1, AMFBS_HasSVE, { MCK_SVEVectorBReg, MCK_SVECpyImm8 }, },
23959 { 3356 /* mov */, AArch64::CPY_ZPmI_B, Convert__SVEVectorBReg1_0__Tie0_1_1__SVEPredicateAnyReg1_1__SVECpyImm82_4, AMFBS_HasSVE, { MCK_SVEVectorBReg, MCK_SVEPredicateAnyReg, MCK__47_, MCK_m, MCK_SVECpyImm8 }, },
23961 { 3356 /* mov */, AArch64::CPY_ZPzI_B, Convert__SVEVectorBReg1_0__SVEPredicateAnyReg1_1__SVECpyImm82_4, AMFBS_HasSVE, { MCK_SVEVectorBReg, MCK_SVEPredicateAnyReg, MCK__47_, MCK_z, MCK_SVECpyImm8 }, },
29175 { 787 /* cpy */, 16 /* 4 */, MCK_SVECpyImm8, AMFBS_HasSVE },
29178 { 787 /* cpy */, 16 /* 4 */, MCK_SVECpyImm8, AMFBS_HasSVE },
29181 { 787 /* cpy */, 16 /* 4 */, MCK_SVECpyImm8, AMFBS_HasSVE },
29184 { 787 /* cpy */, 16 /* 4 */, MCK_SVECpyImm8, AMFBS_HasSVE },
29288 { 962 /* dup */, 2 /* 1 */, MCK_SVECpyImm8, AMFBS_HasSVE },
29290 { 962 /* dup */, 2 /* 1 */, MCK_SVECpyImm8, AMFBS_HasSVE },
34986 { 3356 /* mov */, 2 /* 1 */, MCK_SVECpyImm8, AMFBS_HasSVE },
34988 { 3356 /* mov */, 2 /* 1 */, MCK_SVECpyImm8, AMFBS_HasSVE },
35091 { 3356 /* mov */, 16 /* 4 */, MCK_SVECpyImm8, AMFBS_HasSVE },
35094 { 3356 /* mov */, 16 /* 4 */, MCK_SVECpyImm8, AMFBS_HasSVE },
35101 { 3356 /* mov */, 16 /* 4 */, MCK_SVECpyImm8, AMFBS_HasSVE },
35104 { 3356 /* mov */, 16 /* 4 */, MCK_SVECpyImm8, AMFBS_HasSVE },
40713 case MCK_SVECpyImm8: