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reference, declaration → definition
definition → references, declarations, derived classes, virtual overrides
reference to multiple definitions → definitions
unreferenced
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References
gen/lib/Target/AArch64/AArch64GenAsmMatcher.inc 9626 case MCK_SVECpyImm64: {
12060 case MCK_SVECpyImm64: return "MCK_SVECpyImm64";
13387 { 787 /* cpy */, AArch64::CPY_ZPmI_D, Convert__SVEVectorDReg1_0__Tie0_1_1__SVEPredicateAnyReg1_1__SVECpyImm642_4, AMFBS_HasSVE, { MCK_SVEVectorDReg, MCK_SVEPredicateAnyReg, MCK__47_, MCK_m, MCK_SVECpyImm64 }, },
13388 { 787 /* cpy */, AArch64::CPY_ZPzI_D, Convert__SVEVectorDReg1_0__SVEPredicateAnyReg1_1__SVECpyImm642_4, AMFBS_HasSVE, { MCK_SVEVectorDReg, MCK_SVEPredicateAnyReg, MCK__47_, MCK_z, MCK_SVECpyImm64 }, },
13463 { 962 /* dup */, AArch64::DUP_ZI_D, Convert__SVEVectorDReg1_0__SVECpyImm642_1, AMFBS_HasSVE, { MCK_SVEVectorDReg, MCK_SVECpyImm64 }, },
16548 { 3356 /* mov */, AArch64::DUP_ZI_D, Convert__SVEVectorDReg1_0__SVECpyImm642_1, AMFBS_HasSVE, { MCK_SVEVectorDReg, MCK_SVECpyImm64 }, },
16592 { 3356 /* mov */, AArch64::CPY_ZPmI_D, Convert__SVEVectorDReg1_0__Tie0_1_1__SVEPredicateAnyReg1_1__SVECpyImm642_4, AMFBS_HasSVE, { MCK_SVEVectorDReg, MCK_SVEPredicateAnyReg, MCK__47_, MCK_m, MCK_SVECpyImm64 }, },
16594 { 3356 /* mov */, AArch64::CPY_ZPzI_D, Convert__SVEVectorDReg1_0__SVEPredicateAnyReg1_1__SVECpyImm642_4, AMFBS_HasSVE, { MCK_SVEVectorDReg, MCK_SVEPredicateAnyReg, MCK__47_, MCK_z, MCK_SVECpyImm64 }, },
20745 { 787 /* cpy */, AArch64::CPY_ZPmI_D, Convert__SVEVectorDReg1_0__Tie0_1_1__SVEPredicateAnyReg1_1__SVECpyImm642_4, AMFBS_HasSVE, { MCK_SVEVectorDReg, MCK_SVEPredicateAnyReg, MCK__47_, MCK_m, MCK_SVECpyImm64 }, },
20746 { 787 /* cpy */, AArch64::CPY_ZPzI_D, Convert__SVEVectorDReg1_0__SVEPredicateAnyReg1_1__SVECpyImm642_4, AMFBS_HasSVE, { MCK_SVEVectorDReg, MCK_SVEPredicateAnyReg, MCK__47_, MCK_z, MCK_SVECpyImm64 }, },
20821 { 962 /* dup */, AArch64::DUP_ZI_D, Convert__SVEVectorDReg1_0__SVECpyImm642_1, AMFBS_HasSVE, { MCK_SVEVectorDReg, MCK_SVECpyImm64 }, },
23906 { 3356 /* mov */, AArch64::DUP_ZI_D, Convert__SVEVectorDReg1_0__SVECpyImm642_1, AMFBS_HasSVE, { MCK_SVEVectorDReg, MCK_SVECpyImm64 }, },
23954 { 3356 /* mov */, AArch64::CPY_ZPmI_D, Convert__SVEVectorDReg1_0__Tie0_1_1__SVEPredicateAnyReg1_1__SVECpyImm642_4, AMFBS_HasSVE, { MCK_SVEVectorDReg, MCK_SVEPredicateAnyReg, MCK__47_, MCK_m, MCK_SVECpyImm64 }, },
23956 { 3356 /* mov */, AArch64::CPY_ZPzI_D, Convert__SVEVectorDReg1_0__SVEPredicateAnyReg1_1__SVECpyImm642_4, AMFBS_HasSVE, { MCK_SVEVectorDReg, MCK_SVEPredicateAnyReg, MCK__47_, MCK_z, MCK_SVECpyImm64 }, },
29155 { 787 /* cpy */, 16 /* 4 */, MCK_SVECpyImm64, AMFBS_HasSVE },
29158 { 787 /* cpy */, 16 /* 4 */, MCK_SVECpyImm64, AMFBS_HasSVE },
29161 { 787 /* cpy */, 16 /* 4 */, MCK_SVECpyImm64, AMFBS_HasSVE },
29164 { 787 /* cpy */, 16 /* 4 */, MCK_SVECpyImm64, AMFBS_HasSVE },
29282 { 962 /* dup */, 2 /* 1 */, MCK_SVECpyImm64, AMFBS_HasSVE },
29284 { 962 /* dup */, 2 /* 1 */, MCK_SVECpyImm64, AMFBS_HasSVE },
34974 { 3356 /* mov */, 2 /* 1 */, MCK_SVECpyImm64, AMFBS_HasSVE },
34976 { 3356 /* mov */, 2 /* 1 */, MCK_SVECpyImm64, AMFBS_HasSVE },
35067 { 3356 /* mov */, 16 /* 4 */, MCK_SVECpyImm64, AMFBS_HasSVE },
35070 { 3356 /* mov */, 16 /* 4 */, MCK_SVECpyImm64, AMFBS_HasSVE },
35077 { 3356 /* mov */, 16 /* 4 */, MCK_SVECpyImm64, AMFBS_HasSVE },
35080 { 3356 /* mov */, 16 /* 4 */, MCK_SVECpyImm64, AMFBS_HasSVE },
40711 case MCK_SVECpyImm64: