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reference, declaration → definition
definition → references, declarations, derived classes, virtual overrides
reference to multiple definitions → definitions
unreferenced
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References
gen/lib/Target/AArch64/AArch64GenAsmMatcher.inc 9608 case MCK_SVECpyImm16: {
12058 case MCK_SVECpyImm16: return "MCK_SVECpyImm16";
13379 { 787 /* cpy */, AArch64::CPY_ZPmI_H, Convert__SVEVectorHReg1_0__Tie0_1_1__SVEPredicateAnyReg1_1__SVECpyImm162_4, AMFBS_HasSVE, { MCK_SVEVectorHReg, MCK_SVEPredicateAnyReg, MCK__47_, MCK_m, MCK_SVECpyImm16 }, },
13380 { 787 /* cpy */, AArch64::CPY_ZPzI_H, Convert__SVEVectorHReg1_0__SVEPredicateAnyReg1_1__SVECpyImm162_4, AMFBS_HasSVE, { MCK_SVEVectorHReg, MCK_SVEPredicateAnyReg, MCK__47_, MCK_z, MCK_SVECpyImm16 }, },
13459 { 962 /* dup */, AArch64::DUP_ZI_H, Convert__SVEVectorHReg1_0__SVECpyImm162_1, AMFBS_HasSVE, { MCK_SVEVectorHReg, MCK_SVECpyImm16 }, },
16540 { 3356 /* mov */, AArch64::DUP_ZI_H, Convert__SVEVectorHReg1_0__SVECpyImm162_1, AMFBS_HasSVE, { MCK_SVEVectorHReg, MCK_SVECpyImm16 }, },
16582 { 3356 /* mov */, AArch64::CPY_ZPmI_H, Convert__SVEVectorHReg1_0__Tie0_1_1__SVEPredicateAnyReg1_1__SVECpyImm162_4, AMFBS_HasSVE, { MCK_SVEVectorHReg, MCK_SVEPredicateAnyReg, MCK__47_, MCK_m, MCK_SVECpyImm16 }, },
16584 { 3356 /* mov */, AArch64::CPY_ZPzI_H, Convert__SVEVectorHReg1_0__SVEPredicateAnyReg1_1__SVECpyImm162_4, AMFBS_HasSVE, { MCK_SVEVectorHReg, MCK_SVEPredicateAnyReg, MCK__47_, MCK_z, MCK_SVECpyImm16 }, },
20737 { 787 /* cpy */, AArch64::CPY_ZPmI_H, Convert__SVEVectorHReg1_0__Tie0_1_1__SVEPredicateAnyReg1_1__SVECpyImm162_4, AMFBS_HasSVE, { MCK_SVEVectorHReg, MCK_SVEPredicateAnyReg, MCK__47_, MCK_m, MCK_SVECpyImm16 }, },
20738 { 787 /* cpy */, AArch64::CPY_ZPzI_H, Convert__SVEVectorHReg1_0__SVEPredicateAnyReg1_1__SVECpyImm162_4, AMFBS_HasSVE, { MCK_SVEVectorHReg, MCK_SVEPredicateAnyReg, MCK__47_, MCK_z, MCK_SVECpyImm16 }, },
20817 { 962 /* dup */, AArch64::DUP_ZI_H, Convert__SVEVectorHReg1_0__SVECpyImm162_1, AMFBS_HasSVE, { MCK_SVEVectorHReg, MCK_SVECpyImm16 }, },
23898 { 3356 /* mov */, AArch64::DUP_ZI_H, Convert__SVEVectorHReg1_0__SVECpyImm162_1, AMFBS_HasSVE, { MCK_SVEVectorHReg, MCK_SVECpyImm16 }, },
23944 { 3356 /* mov */, AArch64::CPY_ZPmI_H, Convert__SVEVectorHReg1_0__Tie0_1_1__SVEPredicateAnyReg1_1__SVECpyImm162_4, AMFBS_HasSVE, { MCK_SVEVectorHReg, MCK_SVEPredicateAnyReg, MCK__47_, MCK_m, MCK_SVECpyImm16 }, },
23946 { 3356 /* mov */, AArch64::CPY_ZPzI_H, Convert__SVEVectorHReg1_0__SVEPredicateAnyReg1_1__SVECpyImm162_4, AMFBS_HasSVE, { MCK_SVEVectorHReg, MCK_SVEPredicateAnyReg, MCK__47_, MCK_z, MCK_SVECpyImm16 }, },
29115 { 787 /* cpy */, 16 /* 4 */, MCK_SVECpyImm16, AMFBS_HasSVE },
29118 { 787 /* cpy */, 16 /* 4 */, MCK_SVECpyImm16, AMFBS_HasSVE },
29121 { 787 /* cpy */, 16 /* 4 */, MCK_SVECpyImm16, AMFBS_HasSVE },
29124 { 787 /* cpy */, 16 /* 4 */, MCK_SVECpyImm16, AMFBS_HasSVE },
29270 { 962 /* dup */, 2 /* 1 */, MCK_SVECpyImm16, AMFBS_HasSVE },
29272 { 962 /* dup */, 2 /* 1 */, MCK_SVECpyImm16, AMFBS_HasSVE },
34954 { 3356 /* mov */, 2 /* 1 */, MCK_SVECpyImm16, AMFBS_HasSVE },
34956 { 3356 /* mov */, 2 /* 1 */, MCK_SVECpyImm16, AMFBS_HasSVE },
35019 { 3356 /* mov */, 16 /* 4 */, MCK_SVECpyImm16, AMFBS_HasSVE },
35022 { 3356 /* mov */, 16 /* 4 */, MCK_SVECpyImm16, AMFBS_HasSVE },
35029 { 3356 /* mov */, 16 /* 4 */, MCK_SVECpyImm16, AMFBS_HasSVE },
35032 { 3356 /* mov */, 16 /* 4 */, MCK_SVECpyImm16, AMFBS_HasSVE },
40707 case MCK_SVECpyImm16: