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reference, declaration → definition
definition → references, declarations, derived classes, virtual overrides
reference to multiple definitions → definitions
unreferenced
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References
gen/lib/Target/AArch64/AArch64GenAsmMatcher.inc10964 case MCK_SImm9s16: {
12230 case MCK_SImm9s16: return "MCK_SImm9s16";
15983 { 2502 /* ldg */, AArch64::LDG, Convert__Reg1_0__Tie0_1_1__Reg1_2__SImm9s161_3, AMFBS_HasMTE, { MCK_GPR64, MCK__91_, MCK_GPR64sp, MCK_SImm9s16, MCK__93_ }, },
18482 { 5272 /* st2g */, AArch64::ST2GPostIndex, Convert__Reg1_2__Reg1_0__Tie0_3_3__SImm9s161_4, AMFBS_HasMTE, { MCK_GPR64sp, MCK__91_, MCK_GPR64sp, MCK__93_, MCK_SImm9s16 }, },
18483 { 5272 /* st2g */, AArch64::ST2GOffset, Convert__Reg1_0__Reg1_2__SImm9s161_3, AMFBS_HasMTE, { MCK_GPR64sp, MCK__91_, MCK_GPR64sp, MCK_SImm9s16, MCK__93_ }, },
18484 { 5272 /* st2g */, AArch64::ST2GPreIndex, Convert__Reg1_2__Reg1_0__Tie0_3_3__SImm9s161_3, AMFBS_HasMTE, { MCK_GPR64sp, MCK__91_, MCK_GPR64sp, MCK_SImm9s16, MCK__93_, MCK__EXCLAIM_ }, },
18672 { 5464 /* stg */, AArch64::STGPostIndex, Convert__Reg1_2__Reg1_0__Tie0_3_3__SImm9s161_4, AMFBS_HasMTE, { MCK_GPR64sp, MCK__91_, MCK_GPR64sp, MCK__93_, MCK_SImm9s16 }, },
18673 { 5464 /* stg */, AArch64::STGOffset, Convert__Reg1_0__Reg1_2__SImm9s161_3, AMFBS_HasMTE, { MCK_GPR64sp, MCK__91_, MCK_GPR64sp, MCK_SImm9s16, MCK__93_ }, },
18674 { 5464 /* stg */, AArch64::STGPreIndex, Convert__Reg1_2__Reg1_0__Tie0_3_3__SImm9s161_3, AMFBS_HasMTE, { MCK_GPR64sp, MCK__91_, MCK_GPR64sp, MCK_SImm9s16, MCK__93_, MCK__EXCLAIM_ }, },
18933 { 5907 /* stz2g */, AArch64::STZ2GPostIndex, Convert__Reg1_2__Reg1_0__Tie0_3_3__SImm9s161_4, AMFBS_HasMTE, { MCK_GPR64sp, MCK__91_, MCK_GPR64sp, MCK__93_, MCK_SImm9s16 }, },
18934 { 5907 /* stz2g */, AArch64::STZ2GOffset, Convert__Reg1_0__Reg1_2__SImm9s161_3, AMFBS_HasMTE, { MCK_GPR64sp, MCK__91_, MCK_GPR64sp, MCK_SImm9s16, MCK__93_ }, },
18935 { 5907 /* stz2g */, AArch64::STZ2GPreIndex, Convert__Reg1_2__Reg1_0__Tie0_3_3__SImm9s161_3, AMFBS_HasMTE, { MCK_GPR64sp, MCK__91_, MCK_GPR64sp, MCK_SImm9s16, MCK__93_, MCK__EXCLAIM_ }, },
18937 { 5913 /* stzg */, AArch64::STZGPostIndex, Convert__Reg1_2__Reg1_0__Tie0_3_3__SImm9s161_4, AMFBS_HasMTE, { MCK_GPR64sp, MCK__91_, MCK_GPR64sp, MCK__93_, MCK_SImm9s16 }, },
18938 { 5913 /* stzg */, AArch64::STZGOffset, Convert__Reg1_0__Reg1_2__SImm9s161_3, AMFBS_HasMTE, { MCK_GPR64sp, MCK__91_, MCK_GPR64sp, MCK_SImm9s16, MCK__93_ }, },
18939 { 5913 /* stzg */, AArch64::STZGPreIndex, Convert__Reg1_2__Reg1_0__Tie0_3_3__SImm9s161_3, AMFBS_HasMTE, { MCK_GPR64sp, MCK__91_, MCK_GPR64sp, MCK_SImm9s16, MCK__93_, MCK__EXCLAIM_ }, },
23341 { 2502 /* ldg */, AArch64::LDG, Convert__Reg1_0__Tie0_1_1__Reg1_2__SImm9s161_3, AMFBS_HasMTE, { MCK_GPR64, MCK__91_, MCK_GPR64sp, MCK_SImm9s16, MCK__93_ }, },
25840 { 5272 /* st2g */, AArch64::ST2GPostIndex, Convert__Reg1_2__Reg1_0__Tie0_3_3__SImm9s161_4, AMFBS_HasMTE, { MCK_GPR64sp, MCK__91_, MCK_GPR64sp, MCK__93_, MCK_SImm9s16 }, },
25841 { 5272 /* st2g */, AArch64::ST2GOffset, Convert__Reg1_0__Reg1_2__SImm9s161_3, AMFBS_HasMTE, { MCK_GPR64sp, MCK__91_, MCK_GPR64sp, MCK_SImm9s16, MCK__93_ }, },
25842 { 5272 /* st2g */, AArch64::ST2GPreIndex, Convert__Reg1_2__Reg1_0__Tie0_3_3__SImm9s161_3, AMFBS_HasMTE, { MCK_GPR64sp, MCK__91_, MCK_GPR64sp, MCK_SImm9s16, MCK__93_, MCK__EXCLAIM_ }, },
26030 { 5464 /* stg */, AArch64::STGPostIndex, Convert__Reg1_2__Reg1_0__Tie0_3_3__SImm9s161_4, AMFBS_HasMTE, { MCK_GPR64sp, MCK__91_, MCK_GPR64sp, MCK__93_, MCK_SImm9s16 }, },
26031 { 5464 /* stg */, AArch64::STGOffset, Convert__Reg1_0__Reg1_2__SImm9s161_3, AMFBS_HasMTE, { MCK_GPR64sp, MCK__91_, MCK_GPR64sp, MCK_SImm9s16, MCK__93_ }, },
26032 { 5464 /* stg */, AArch64::STGPreIndex, Convert__Reg1_2__Reg1_0__Tie0_3_3__SImm9s161_3, AMFBS_HasMTE, { MCK_GPR64sp, MCK__91_, MCK_GPR64sp, MCK_SImm9s16, MCK__93_, MCK__EXCLAIM_ }, },
26291 { 5907 /* stz2g */, AArch64::STZ2GPostIndex, Convert__Reg1_2__Reg1_0__Tie0_3_3__SImm9s161_4, AMFBS_HasMTE, { MCK_GPR64sp, MCK__91_, MCK_GPR64sp, MCK__93_, MCK_SImm9s16 }, },
26292 { 5907 /* stz2g */, AArch64::STZ2GOffset, Convert__Reg1_0__Reg1_2__SImm9s161_3, AMFBS_HasMTE, { MCK_GPR64sp, MCK__91_, MCK_GPR64sp, MCK_SImm9s16, MCK__93_ }, },
26293 { 5907 /* stz2g */, AArch64::STZ2GPreIndex, Convert__Reg1_2__Reg1_0__Tie0_3_3__SImm9s161_3, AMFBS_HasMTE, { MCK_GPR64sp, MCK__91_, MCK_GPR64sp, MCK_SImm9s16, MCK__93_, MCK__EXCLAIM_ }, },
26295 { 5913 /* stzg */, AArch64::STZGPostIndex, Convert__Reg1_2__Reg1_0__Tie0_3_3__SImm9s161_4, AMFBS_HasMTE, { MCK_GPR64sp, MCK__91_, MCK_GPR64sp, MCK__93_, MCK_SImm9s16 }, },
26296 { 5913 /* stzg */, AArch64::STZGOffset, Convert__Reg1_0__Reg1_2__SImm9s161_3, AMFBS_HasMTE, { MCK_GPR64sp, MCK__91_, MCK_GPR64sp, MCK_SImm9s16, MCK__93_ }, },
26297 { 5913 /* stzg */, AArch64::STZGPreIndex, Convert__Reg1_2__Reg1_0__Tie0_3_3__SImm9s161_3, AMFBS_HasMTE, { MCK_GPR64sp, MCK__91_, MCK_GPR64sp, MCK_SImm9s16, MCK__93_, MCK__EXCLAIM_ }, },