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reference, declaration → definition
definition → references, declarations, derived classes, virtual overrides
reference to multiple definitions → definitions
unreferenced
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References
gen/lib/Target/AArch64/AArch64GenAsmMatcher.inc 9510 case MCK_SImm7s8: {
12046 case MCK_SImm7s8: return "MCK_SImm7s8";
16059 { 2583 /* ldnp */, AArch64::LDNPXi, Convert__Reg1_0__Reg1_1__Reg1_3__SImm7s81_4, AMFBS_None, { MCK_GPR64, MCK_GPR64, MCK__91_, MCK_GPR64sp, MCK_SImm7s8, MCK__93_ }, },
16061 { 2583 /* ldnp */, AArch64::LDNPDi, Convert__FPRAsmOperandFPR641_0__FPRAsmOperandFPR641_1__Reg1_3__SImm7s81_4, AMFBS_None, { MCK_FPRAsmOperandFPR64, MCK_FPRAsmOperandFPR64, MCK__91_, MCK_GPR64sp, MCK_SImm7s8, MCK__93_ }, },
16142 { 2640 /* ldp */, AArch64::LDPXpost, Convert__Reg1_3__Reg1_0__Reg1_1__Tie0_4_4__SImm7s81_5, AMFBS_None, { MCK_GPR64, MCK_GPR64, MCK__91_, MCK_GPR64sp, MCK__93_, MCK_SImm7s8 }, },
16143 { 2640 /* ldp */, AArch64::LDPXi, Convert__Reg1_0__Reg1_1__Reg1_3__SImm7s81_4, AMFBS_None, { MCK_GPR64, MCK_GPR64, MCK__91_, MCK_GPR64sp, MCK_SImm7s8, MCK__93_ }, },
16146 { 2640 /* ldp */, AArch64::LDPDpost, Convert__Reg1_3__FPRAsmOperandFPR641_0__FPRAsmOperandFPR641_1__Tie0_4_4__SImm7s81_5, AMFBS_None, { MCK_FPRAsmOperandFPR64, MCK_FPRAsmOperandFPR64, MCK__91_, MCK_GPR64sp, MCK__93_, MCK_SImm7s8 }, },
16147 { 2640 /* ldp */, AArch64::LDPDi, Convert__FPRAsmOperandFPR641_0__FPRAsmOperandFPR641_1__Reg1_3__SImm7s81_4, AMFBS_None, { MCK_FPRAsmOperandFPR64, MCK_FPRAsmOperandFPR64, MCK__91_, MCK_GPR64sp, MCK_SImm7s8, MCK__93_ }, },
16151 { 2640 /* ldp */, AArch64::LDPXpre, Convert__Reg1_3__Reg1_0__Reg1_1__Tie0_4_4__SImm7s81_4, AMFBS_None, { MCK_GPR64, MCK_GPR64, MCK__91_, MCK_GPR64sp, MCK_SImm7s8, MCK__93_, MCK__EXCLAIM_ }, },
16153 { 2640 /* ldp */, AArch64::LDPDpre, Convert__Reg1_3__FPRAsmOperandFPR641_0__FPRAsmOperandFPR641_1__Tie0_4_4__SImm7s81_4, AMFBS_None, { MCK_FPRAsmOperandFPR64, MCK_FPRAsmOperandFPR64, MCK__91_, MCK_GPR64sp, MCK_SImm7s8, MCK__93_, MCK__EXCLAIM_ }, },
18708 { 5561 /* stnp */, AArch64::STNPXi, Convert__Reg1_0__Reg1_1__Reg1_3__SImm7s81_4, AMFBS_None, { MCK_GPR64, MCK_GPR64, MCK__91_, MCK_GPR64sp, MCK_SImm7s8, MCK__93_ }, },
18710 { 5561 /* stnp */, AArch64::STNPDi, Convert__FPRAsmOperandFPR641_0__FPRAsmOperandFPR641_1__Reg1_3__SImm7s81_4, AMFBS_None, { MCK_FPRAsmOperandFPR64, MCK_FPRAsmOperandFPR64, MCK__91_, MCK_GPR64sp, MCK_SImm7s8, MCK__93_ }, },
18771 { 5594 /* stp */, AArch64::STPXpost, Convert__Reg1_3__Reg1_0__Reg1_1__Tie0_4_4__SImm7s81_5, AMFBS_None, { MCK_GPR64, MCK_GPR64, MCK__91_, MCK_GPR64sp, MCK__93_, MCK_SImm7s8 }, },
18772 { 5594 /* stp */, AArch64::STPXi, Convert__Reg1_0__Reg1_1__Reg1_3__SImm7s81_4, AMFBS_None, { MCK_GPR64, MCK_GPR64, MCK__91_, MCK_GPR64sp, MCK_SImm7s8, MCK__93_ }, },
18775 { 5594 /* stp */, AArch64::STPDpost, Convert__Reg1_3__FPRAsmOperandFPR641_0__FPRAsmOperandFPR641_1__Tie0_4_4__SImm7s81_5, AMFBS_None, { MCK_FPRAsmOperandFPR64, MCK_FPRAsmOperandFPR64, MCK__91_, MCK_GPR64sp, MCK__93_, MCK_SImm7s8 }, },
18776 { 5594 /* stp */, AArch64::STPDi, Convert__FPRAsmOperandFPR641_0__FPRAsmOperandFPR641_1__Reg1_3__SImm7s81_4, AMFBS_None, { MCK_FPRAsmOperandFPR64, MCK_FPRAsmOperandFPR64, MCK__91_, MCK_GPR64sp, MCK_SImm7s8, MCK__93_ }, },
18780 { 5594 /* stp */, AArch64::STPXpre, Convert__Reg1_3__Reg1_0__Reg1_1__Tie0_4_4__SImm7s81_4, AMFBS_None, { MCK_GPR64, MCK_GPR64, MCK__91_, MCK_GPR64sp, MCK_SImm7s8, MCK__93_, MCK__EXCLAIM_ }, },
18782 { 5594 /* stp */, AArch64::STPDpre, Convert__Reg1_3__FPRAsmOperandFPR641_0__FPRAsmOperandFPR641_1__Tie0_4_4__SImm7s81_4, AMFBS_None, { MCK_FPRAsmOperandFPR64, MCK_FPRAsmOperandFPR64, MCK__91_, MCK_GPR64sp, MCK_SImm7s8, MCK__93_, MCK__EXCLAIM_ }, },
23417 { 2583 /* ldnp */, AArch64::LDNPXi, Convert__Reg1_0__Reg1_1__Reg1_3__SImm7s81_4, AMFBS_None, { MCK_GPR64, MCK_GPR64, MCK__91_, MCK_GPR64sp, MCK_SImm7s8, MCK__93_ }, },
23419 { 2583 /* ldnp */, AArch64::LDNPDi, Convert__FPRAsmOperandFPR641_0__FPRAsmOperandFPR641_1__Reg1_3__SImm7s81_4, AMFBS_None, { MCK_FPRAsmOperandFPR64, MCK_FPRAsmOperandFPR64, MCK__91_, MCK_GPR64sp, MCK_SImm7s8, MCK__93_ }, },
23500 { 2640 /* ldp */, AArch64::LDPXpost, Convert__Reg1_3__Reg1_0__Reg1_1__Tie0_4_4__SImm7s81_5, AMFBS_None, { MCK_GPR64, MCK_GPR64, MCK__91_, MCK_GPR64sp, MCK__93_, MCK_SImm7s8 }, },
23501 { 2640 /* ldp */, AArch64::LDPXi, Convert__Reg1_0__Reg1_1__Reg1_3__SImm7s81_4, AMFBS_None, { MCK_GPR64, MCK_GPR64, MCK__91_, MCK_GPR64sp, MCK_SImm7s8, MCK__93_ }, },
23504 { 2640 /* ldp */, AArch64::LDPDpost, Convert__Reg1_3__FPRAsmOperandFPR641_0__FPRAsmOperandFPR641_1__Tie0_4_4__SImm7s81_5, AMFBS_None, { MCK_FPRAsmOperandFPR64, MCK_FPRAsmOperandFPR64, MCK__91_, MCK_GPR64sp, MCK__93_, MCK_SImm7s8 }, },
23505 { 2640 /* ldp */, AArch64::LDPDi, Convert__FPRAsmOperandFPR641_0__FPRAsmOperandFPR641_1__Reg1_3__SImm7s81_4, AMFBS_None, { MCK_FPRAsmOperandFPR64, MCK_FPRAsmOperandFPR64, MCK__91_, MCK_GPR64sp, MCK_SImm7s8, MCK__93_ }, },
23509 { 2640 /* ldp */, AArch64::LDPXpre, Convert__Reg1_3__Reg1_0__Reg1_1__Tie0_4_4__SImm7s81_4, AMFBS_None, { MCK_GPR64, MCK_GPR64, MCK__91_, MCK_GPR64sp, MCK_SImm7s8, MCK__93_, MCK__EXCLAIM_ }, },
23511 { 2640 /* ldp */, AArch64::LDPDpre, Convert__Reg1_3__FPRAsmOperandFPR641_0__FPRAsmOperandFPR641_1__Tie0_4_4__SImm7s81_4, AMFBS_None, { MCK_FPRAsmOperandFPR64, MCK_FPRAsmOperandFPR64, MCK__91_, MCK_GPR64sp, MCK_SImm7s8, MCK__93_, MCK__EXCLAIM_ }, },
26066 { 5561 /* stnp */, AArch64::STNPXi, Convert__Reg1_0__Reg1_1__Reg1_3__SImm7s81_4, AMFBS_None, { MCK_GPR64, MCK_GPR64, MCK__91_, MCK_GPR64sp, MCK_SImm7s8, MCK__93_ }, },
26068 { 5561 /* stnp */, AArch64::STNPDi, Convert__FPRAsmOperandFPR641_0__FPRAsmOperandFPR641_1__Reg1_3__SImm7s81_4, AMFBS_None, { MCK_FPRAsmOperandFPR64, MCK_FPRAsmOperandFPR64, MCK__91_, MCK_GPR64sp, MCK_SImm7s8, MCK__93_ }, },
26129 { 5594 /* stp */, AArch64::STPXpost, Convert__Reg1_3__Reg1_0__Reg1_1__Tie0_4_4__SImm7s81_5, AMFBS_None, { MCK_GPR64, MCK_GPR64, MCK__91_, MCK_GPR64sp, MCK__93_, MCK_SImm7s8 }, },
26130 { 5594 /* stp */, AArch64::STPXi, Convert__Reg1_0__Reg1_1__Reg1_3__SImm7s81_4, AMFBS_None, { MCK_GPR64, MCK_GPR64, MCK__91_, MCK_GPR64sp, MCK_SImm7s8, MCK__93_ }, },
26133 { 5594 /* stp */, AArch64::STPDpost, Convert__Reg1_3__FPRAsmOperandFPR641_0__FPRAsmOperandFPR641_1__Tie0_4_4__SImm7s81_5, AMFBS_None, { MCK_FPRAsmOperandFPR64, MCK_FPRAsmOperandFPR64, MCK__91_, MCK_GPR64sp, MCK__93_, MCK_SImm7s8 }, },
26134 { 5594 /* stp */, AArch64::STPDi, Convert__FPRAsmOperandFPR641_0__FPRAsmOperandFPR641_1__Reg1_3__SImm7s81_4, AMFBS_None, { MCK_FPRAsmOperandFPR64, MCK_FPRAsmOperandFPR64, MCK__91_, MCK_GPR64sp, MCK_SImm7s8, MCK__93_ }, },
26138 { 5594 /* stp */, AArch64::STPXpre, Convert__Reg1_3__Reg1_0__Reg1_1__Tie0_4_4__SImm7s81_4, AMFBS_None, { MCK_GPR64, MCK_GPR64, MCK__91_, MCK_GPR64sp, MCK_SImm7s8, MCK__93_, MCK__EXCLAIM_ }, },
26140 { 5594 /* stp */, AArch64::STPDpre, Convert__Reg1_3__FPRAsmOperandFPR641_0__FPRAsmOperandFPR641_1__Tie0_4_4__SImm7s81_4, AMFBS_None, { MCK_FPRAsmOperandFPR64, MCK_FPRAsmOperandFPR64, MCK__91_, MCK_GPR64sp, MCK_SImm7s8, MCK__93_, MCK__EXCLAIM_ }, },