reference, declarationdefinition
definition → references, declarations, derived classes, virtual overrides
reference to multiple definitions → definitions
unreferenced

References

gen/lib/Target/AArch64/AArch64GenAsmMatcher.inc
 9465   case MCK_SImm5: {
12041   case MCK_SImm5: return "MCK_SImm5";
13228   { 669 /* cmpeq */, AArch64::CMPEQ_PPzZI_H, Convert__SVEPredicateHReg1_0__SVEPredicate3bAnyReg1_1__SVEVectorHReg1_4__SImm51_5, AMFBS_HasSVE, { MCK_SVEPredicateHReg, MCK_SVEPredicate3bAnyReg, MCK__47_, MCK_z, MCK_SVEVectorHReg, MCK_SImm5 }, },
13231   { 669 /* cmpeq */, AArch64::CMPEQ_PPzZI_S, Convert__SVEPredicateSReg1_0__SVEPredicate3bAnyReg1_1__SVEVectorSReg1_4__SImm51_5, AMFBS_HasSVE, { MCK_SVEPredicateSReg, MCK_SVEPredicate3bAnyReg, MCK__47_, MCK_z, MCK_SVEVectorSReg, MCK_SImm5 }, },
13234   { 669 /* cmpeq */, AArch64::CMPEQ_PPzZI_D, Convert__SVEPredicateDReg1_0__SVEPredicate3bAnyReg1_1__SVEVectorDReg1_4__SImm51_5, AMFBS_HasSVE, { MCK_SVEPredicateDReg, MCK_SVEPredicate3bAnyReg, MCK__47_, MCK_z, MCK_SVEVectorDReg, MCK_SImm5 }, },
13236   { 669 /* cmpeq */, AArch64::CMPEQ_PPzZI_B, Convert__SVEPredicateBReg1_0__SVEPredicate3bAnyReg1_1__SVEVectorBReg1_4__SImm51_5, AMFBS_HasSVE, { MCK_SVEPredicateBReg, MCK_SVEPredicate3bAnyReg, MCK__47_, MCK_z, MCK_SVEVectorBReg, MCK_SImm5 }, },
13239   { 675 /* cmpge */, AArch64::CMPGE_PPzZI_H, Convert__SVEPredicateHReg1_0__SVEPredicate3bAnyReg1_1__SVEVectorHReg1_4__SImm51_5, AMFBS_HasSVE, { MCK_SVEPredicateHReg, MCK_SVEPredicate3bAnyReg, MCK__47_, MCK_z, MCK_SVEVectorHReg, MCK_SImm5 }, },
13242   { 675 /* cmpge */, AArch64::CMPGE_PPzZI_S, Convert__SVEPredicateSReg1_0__SVEPredicate3bAnyReg1_1__SVEVectorSReg1_4__SImm51_5, AMFBS_HasSVE, { MCK_SVEPredicateSReg, MCK_SVEPredicate3bAnyReg, MCK__47_, MCK_z, MCK_SVEVectorSReg, MCK_SImm5 }, },
13245   { 675 /* cmpge */, AArch64::CMPGE_PPzZI_D, Convert__SVEPredicateDReg1_0__SVEPredicate3bAnyReg1_1__SVEVectorDReg1_4__SImm51_5, AMFBS_HasSVE, { MCK_SVEPredicateDReg, MCK_SVEPredicate3bAnyReg, MCK__47_, MCK_z, MCK_SVEVectorDReg, MCK_SImm5 }, },
13247   { 675 /* cmpge */, AArch64::CMPGE_PPzZI_B, Convert__SVEPredicateBReg1_0__SVEPredicate3bAnyReg1_1__SVEVectorBReg1_4__SImm51_5, AMFBS_HasSVE, { MCK_SVEPredicateBReg, MCK_SVEPredicate3bAnyReg, MCK__47_, MCK_z, MCK_SVEVectorBReg, MCK_SImm5 }, },
13250   { 681 /* cmpgt */, AArch64::CMPGT_PPzZI_H, Convert__SVEPredicateHReg1_0__SVEPredicate3bAnyReg1_1__SVEVectorHReg1_4__SImm51_5, AMFBS_HasSVE, { MCK_SVEPredicateHReg, MCK_SVEPredicate3bAnyReg, MCK__47_, MCK_z, MCK_SVEVectorHReg, MCK_SImm5 }, },
13253   { 681 /* cmpgt */, AArch64::CMPGT_PPzZI_S, Convert__SVEPredicateSReg1_0__SVEPredicate3bAnyReg1_1__SVEVectorSReg1_4__SImm51_5, AMFBS_HasSVE, { MCK_SVEPredicateSReg, MCK_SVEPredicate3bAnyReg, MCK__47_, MCK_z, MCK_SVEVectorSReg, MCK_SImm5 }, },
13256   { 681 /* cmpgt */, AArch64::CMPGT_PPzZI_D, Convert__SVEPredicateDReg1_0__SVEPredicate3bAnyReg1_1__SVEVectorDReg1_4__SImm51_5, AMFBS_HasSVE, { MCK_SVEPredicateDReg, MCK_SVEPredicate3bAnyReg, MCK__47_, MCK_z, MCK_SVEVectorDReg, MCK_SImm5 }, },
13258   { 681 /* cmpgt */, AArch64::CMPGT_PPzZI_B, Convert__SVEPredicateBReg1_0__SVEPredicate3bAnyReg1_1__SVEVectorBReg1_4__SImm51_5, AMFBS_HasSVE, { MCK_SVEPredicateBReg, MCK_SVEPredicate3bAnyReg, MCK__47_, MCK_z, MCK_SVEVectorBReg, MCK_SImm5 }, },
13283   { 699 /* cmple */, AArch64::CMPLE_PPzZI_H, Convert__SVEPredicateHReg1_0__SVEPredicate3bAnyReg1_1__SVEVectorHReg1_4__SImm51_5, AMFBS_HasSVE, { MCK_SVEPredicateHReg, MCK_SVEPredicate3bAnyReg, MCK__47_, MCK_z, MCK_SVEVectorHReg, MCK_SImm5 }, },
13286   { 699 /* cmple */, AArch64::CMPLE_PPzZI_S, Convert__SVEPredicateSReg1_0__SVEPredicate3bAnyReg1_1__SVEVectorSReg1_4__SImm51_5, AMFBS_HasSVE, { MCK_SVEPredicateSReg, MCK_SVEPredicate3bAnyReg, MCK__47_, MCK_z, MCK_SVEVectorSReg, MCK_SImm5 }, },
13289   { 699 /* cmple */, AArch64::CMPLE_PPzZI_D, Convert__SVEPredicateDReg1_0__SVEPredicate3bAnyReg1_1__SVEVectorDReg1_4__SImm51_5, AMFBS_HasSVE, { MCK_SVEPredicateDReg, MCK_SVEPredicate3bAnyReg, MCK__47_, MCK_z, MCK_SVEVectorDReg, MCK_SImm5 }, },
13291   { 699 /* cmple */, AArch64::CMPLE_PPzZI_B, Convert__SVEPredicateBReg1_0__SVEPredicate3bAnyReg1_1__SVEVectorBReg1_4__SImm51_5, AMFBS_HasSVE, { MCK_SVEPredicateBReg, MCK_SVEPredicate3bAnyReg, MCK__47_, MCK_z, MCK_SVEVectorBReg, MCK_SImm5 }, },
13316   { 717 /* cmplt */, AArch64::CMPLT_PPzZI_H, Convert__SVEPredicateHReg1_0__SVEPredicate3bAnyReg1_1__SVEVectorHReg1_4__SImm51_5, AMFBS_HasSVE, { MCK_SVEPredicateHReg, MCK_SVEPredicate3bAnyReg, MCK__47_, MCK_z, MCK_SVEVectorHReg, MCK_SImm5 }, },
13319   { 717 /* cmplt */, AArch64::CMPLT_PPzZI_S, Convert__SVEPredicateSReg1_0__SVEPredicate3bAnyReg1_1__SVEVectorSReg1_4__SImm51_5, AMFBS_HasSVE, { MCK_SVEPredicateSReg, MCK_SVEPredicate3bAnyReg, MCK__47_, MCK_z, MCK_SVEVectorSReg, MCK_SImm5 }, },
13322   { 717 /* cmplt */, AArch64::CMPLT_PPzZI_D, Convert__SVEPredicateDReg1_0__SVEPredicate3bAnyReg1_1__SVEVectorDReg1_4__SImm51_5, AMFBS_HasSVE, { MCK_SVEPredicateDReg, MCK_SVEPredicate3bAnyReg, MCK__47_, MCK_z, MCK_SVEVectorDReg, MCK_SImm5 }, },
13324   { 717 /* cmplt */, AArch64::CMPLT_PPzZI_B, Convert__SVEPredicateBReg1_0__SVEPredicate3bAnyReg1_1__SVEVectorBReg1_4__SImm51_5, AMFBS_HasSVE, { MCK_SVEPredicateBReg, MCK_SVEPredicate3bAnyReg, MCK__47_, MCK_z, MCK_SVEVectorBReg, MCK_SImm5 }, },
13327   { 723 /* cmpne */, AArch64::CMPNE_PPzZI_H, Convert__SVEPredicateHReg1_0__SVEPredicate3bAnyReg1_1__SVEVectorHReg1_4__SImm51_5, AMFBS_HasSVE, { MCK_SVEPredicateHReg, MCK_SVEPredicate3bAnyReg, MCK__47_, MCK_z, MCK_SVEVectorHReg, MCK_SImm5 }, },
13330   { 723 /* cmpne */, AArch64::CMPNE_PPzZI_S, Convert__SVEPredicateSReg1_0__SVEPredicate3bAnyReg1_1__SVEVectorSReg1_4__SImm51_5, AMFBS_HasSVE, { MCK_SVEPredicateSReg, MCK_SVEPredicate3bAnyReg, MCK__47_, MCK_z, MCK_SVEVectorSReg, MCK_SImm5 }, },
13333   { 723 /* cmpne */, AArch64::CMPNE_PPzZI_D, Convert__SVEPredicateDReg1_0__SVEPredicate3bAnyReg1_1__SVEVectorDReg1_4__SImm51_5, AMFBS_HasSVE, { MCK_SVEPredicateDReg, MCK_SVEPredicate3bAnyReg, MCK__47_, MCK_z, MCK_SVEVectorDReg, MCK_SImm5 }, },
13335   { 723 /* cmpne */, AArch64::CMPNE_PPzZI_B, Convert__SVEPredicateBReg1_0__SVEPredicate3bAnyReg1_1__SVEVectorBReg1_4__SImm51_5, AMFBS_HasSVE, { MCK_SVEPredicateBReg, MCK_SVEPredicate3bAnyReg, MCK__47_, MCK_z, MCK_SVEVectorBReg, MCK_SImm5 }, },
14657   { 1819 /* index */, AArch64::INDEX_RI_H, Convert__SVEVectorHReg1_0__Reg1_1__SImm51_2, AMFBS_HasSVE, { MCK_SVEVectorHReg, MCK_GPR32, MCK_SImm5 }, },
14658   { 1819 /* index */, AArch64::INDEX_IR_H, Convert__SVEVectorHReg1_0__SImm51_1__Reg1_2, AMFBS_HasSVE, { MCK_SVEVectorHReg, MCK_SImm5, MCK_GPR32 }, },
14659   { 1819 /* index */, AArch64::INDEX_II_H, Convert__SVEVectorHReg1_0__SImm51_1__SImm51_2, AMFBS_HasSVE, { MCK_SVEVectorHReg, MCK_SImm5, MCK_SImm5 }, },
14659   { 1819 /* index */, AArch64::INDEX_II_H, Convert__SVEVectorHReg1_0__SImm51_1__SImm51_2, AMFBS_HasSVE, { MCK_SVEVectorHReg, MCK_SImm5, MCK_SImm5 }, },
14661   { 1819 /* index */, AArch64::INDEX_RI_S, Convert__SVEVectorSReg1_0__Reg1_1__SImm51_2, AMFBS_HasSVE, { MCK_SVEVectorSReg, MCK_GPR32, MCK_SImm5 }, },
14662   { 1819 /* index */, AArch64::INDEX_IR_S, Convert__SVEVectorSReg1_0__SImm51_1__Reg1_2, AMFBS_HasSVE, { MCK_SVEVectorSReg, MCK_SImm5, MCK_GPR32 }, },
14663   { 1819 /* index */, AArch64::INDEX_II_S, Convert__SVEVectorSReg1_0__SImm51_1__SImm51_2, AMFBS_HasSVE, { MCK_SVEVectorSReg, MCK_SImm5, MCK_SImm5 }, },
14663   { 1819 /* index */, AArch64::INDEX_II_S, Convert__SVEVectorSReg1_0__SImm51_1__SImm51_2, AMFBS_HasSVE, { MCK_SVEVectorSReg, MCK_SImm5, MCK_SImm5 }, },
14665   { 1819 /* index */, AArch64::INDEX_RI_D, Convert__SVEVectorDReg1_0__Reg1_1__SImm51_2, AMFBS_HasSVE, { MCK_SVEVectorDReg, MCK_GPR64, MCK_SImm5 }, },
14666   { 1819 /* index */, AArch64::INDEX_IR_D, Convert__SVEVectorDReg1_0__SImm51_1__Reg1_2, AMFBS_HasSVE, { MCK_SVEVectorDReg, MCK_SImm5, MCK_GPR64 }, },
14667   { 1819 /* index */, AArch64::INDEX_II_D, Convert__SVEVectorDReg1_0__SImm51_1__SImm51_2, AMFBS_HasSVE, { MCK_SVEVectorDReg, MCK_SImm5, MCK_SImm5 }, },
14667   { 1819 /* index */, AArch64::INDEX_II_D, Convert__SVEVectorDReg1_0__SImm51_1__SImm51_2, AMFBS_HasSVE, { MCK_SVEVectorDReg, MCK_SImm5, MCK_SImm5 }, },
14669   { 1819 /* index */, AArch64::INDEX_RI_B, Convert__SVEVectorBReg1_0__Reg1_1__SImm51_2, AMFBS_HasSVE, { MCK_SVEVectorBReg, MCK_GPR32, MCK_SImm5 }, },
14670   { 1819 /* index */, AArch64::INDEX_IR_B, Convert__SVEVectorBReg1_0__SImm51_1__Reg1_2, AMFBS_HasSVE, { MCK_SVEVectorBReg, MCK_SImm5, MCK_GPR32 }, },
14671   { 1819 /* index */, AArch64::INDEX_II_B, Convert__SVEVectorBReg1_0__SImm51_1__SImm51_2, AMFBS_HasSVE, { MCK_SVEVectorBReg, MCK_SImm5, MCK_SImm5 }, },
14671   { 1819 /* index */, AArch64::INDEX_II_B, Convert__SVEVectorBReg1_0__SImm51_1__SImm51_2, AMFBS_HasSVE, { MCK_SVEVectorBReg, MCK_SImm5, MCK_SImm5 }, },
20586   { 669 /* cmpeq */, AArch64::CMPEQ_PPzZI_H, Convert__SVEPredicateHReg1_0__SVEPredicate3bAnyReg1_1__SVEVectorHReg1_4__SImm51_5, AMFBS_HasSVE, { MCK_SVEPredicateHReg, MCK_SVEPredicate3bAnyReg, MCK__47_, MCK_z, MCK_SVEVectorHReg, MCK_SImm5 }, },
20589   { 669 /* cmpeq */, AArch64::CMPEQ_PPzZI_S, Convert__SVEPredicateSReg1_0__SVEPredicate3bAnyReg1_1__SVEVectorSReg1_4__SImm51_5, AMFBS_HasSVE, { MCK_SVEPredicateSReg, MCK_SVEPredicate3bAnyReg, MCK__47_, MCK_z, MCK_SVEVectorSReg, MCK_SImm5 }, },
20592   { 669 /* cmpeq */, AArch64::CMPEQ_PPzZI_D, Convert__SVEPredicateDReg1_0__SVEPredicate3bAnyReg1_1__SVEVectorDReg1_4__SImm51_5, AMFBS_HasSVE, { MCK_SVEPredicateDReg, MCK_SVEPredicate3bAnyReg, MCK__47_, MCK_z, MCK_SVEVectorDReg, MCK_SImm5 }, },
20594   { 669 /* cmpeq */, AArch64::CMPEQ_PPzZI_B, Convert__SVEPredicateBReg1_0__SVEPredicate3bAnyReg1_1__SVEVectorBReg1_4__SImm51_5, AMFBS_HasSVE, { MCK_SVEPredicateBReg, MCK_SVEPredicate3bAnyReg, MCK__47_, MCK_z, MCK_SVEVectorBReg, MCK_SImm5 }, },
20597   { 675 /* cmpge */, AArch64::CMPGE_PPzZI_H, Convert__SVEPredicateHReg1_0__SVEPredicate3bAnyReg1_1__SVEVectorHReg1_4__SImm51_5, AMFBS_HasSVE, { MCK_SVEPredicateHReg, MCK_SVEPredicate3bAnyReg, MCK__47_, MCK_z, MCK_SVEVectorHReg, MCK_SImm5 }, },
20600   { 675 /* cmpge */, AArch64::CMPGE_PPzZI_S, Convert__SVEPredicateSReg1_0__SVEPredicate3bAnyReg1_1__SVEVectorSReg1_4__SImm51_5, AMFBS_HasSVE, { MCK_SVEPredicateSReg, MCK_SVEPredicate3bAnyReg, MCK__47_, MCK_z, MCK_SVEVectorSReg, MCK_SImm5 }, },
20603   { 675 /* cmpge */, AArch64::CMPGE_PPzZI_D, Convert__SVEPredicateDReg1_0__SVEPredicate3bAnyReg1_1__SVEVectorDReg1_4__SImm51_5, AMFBS_HasSVE, { MCK_SVEPredicateDReg, MCK_SVEPredicate3bAnyReg, MCK__47_, MCK_z, MCK_SVEVectorDReg, MCK_SImm5 }, },
20605   { 675 /* cmpge */, AArch64::CMPGE_PPzZI_B, Convert__SVEPredicateBReg1_0__SVEPredicate3bAnyReg1_1__SVEVectorBReg1_4__SImm51_5, AMFBS_HasSVE, { MCK_SVEPredicateBReg, MCK_SVEPredicate3bAnyReg, MCK__47_, MCK_z, MCK_SVEVectorBReg, MCK_SImm5 }, },
20608   { 681 /* cmpgt */, AArch64::CMPGT_PPzZI_H, Convert__SVEPredicateHReg1_0__SVEPredicate3bAnyReg1_1__SVEVectorHReg1_4__SImm51_5, AMFBS_HasSVE, { MCK_SVEPredicateHReg, MCK_SVEPredicate3bAnyReg, MCK__47_, MCK_z, MCK_SVEVectorHReg, MCK_SImm5 }, },
20611   { 681 /* cmpgt */, AArch64::CMPGT_PPzZI_S, Convert__SVEPredicateSReg1_0__SVEPredicate3bAnyReg1_1__SVEVectorSReg1_4__SImm51_5, AMFBS_HasSVE, { MCK_SVEPredicateSReg, MCK_SVEPredicate3bAnyReg, MCK__47_, MCK_z, MCK_SVEVectorSReg, MCK_SImm5 }, },
20614   { 681 /* cmpgt */, AArch64::CMPGT_PPzZI_D, Convert__SVEPredicateDReg1_0__SVEPredicate3bAnyReg1_1__SVEVectorDReg1_4__SImm51_5, AMFBS_HasSVE, { MCK_SVEPredicateDReg, MCK_SVEPredicate3bAnyReg, MCK__47_, MCK_z, MCK_SVEVectorDReg, MCK_SImm5 }, },
20616   { 681 /* cmpgt */, AArch64::CMPGT_PPzZI_B, Convert__SVEPredicateBReg1_0__SVEPredicate3bAnyReg1_1__SVEVectorBReg1_4__SImm51_5, AMFBS_HasSVE, { MCK_SVEPredicateBReg, MCK_SVEPredicate3bAnyReg, MCK__47_, MCK_z, MCK_SVEVectorBReg, MCK_SImm5 }, },
20641   { 699 /* cmple */, AArch64::CMPLE_PPzZI_H, Convert__SVEPredicateHReg1_0__SVEPredicate3bAnyReg1_1__SVEVectorHReg1_4__SImm51_5, AMFBS_HasSVE, { MCK_SVEPredicateHReg, MCK_SVEPredicate3bAnyReg, MCK__47_, MCK_z, MCK_SVEVectorHReg, MCK_SImm5 }, },
20644   { 699 /* cmple */, AArch64::CMPLE_PPzZI_S, Convert__SVEPredicateSReg1_0__SVEPredicate3bAnyReg1_1__SVEVectorSReg1_4__SImm51_5, AMFBS_HasSVE, { MCK_SVEPredicateSReg, MCK_SVEPredicate3bAnyReg, MCK__47_, MCK_z, MCK_SVEVectorSReg, MCK_SImm5 }, },
20647   { 699 /* cmple */, AArch64::CMPLE_PPzZI_D, Convert__SVEPredicateDReg1_0__SVEPredicate3bAnyReg1_1__SVEVectorDReg1_4__SImm51_5, AMFBS_HasSVE, { MCK_SVEPredicateDReg, MCK_SVEPredicate3bAnyReg, MCK__47_, MCK_z, MCK_SVEVectorDReg, MCK_SImm5 }, },
20649   { 699 /* cmple */, AArch64::CMPLE_PPzZI_B, Convert__SVEPredicateBReg1_0__SVEPredicate3bAnyReg1_1__SVEVectorBReg1_4__SImm51_5, AMFBS_HasSVE, { MCK_SVEPredicateBReg, MCK_SVEPredicate3bAnyReg, MCK__47_, MCK_z, MCK_SVEVectorBReg, MCK_SImm5 }, },
20674   { 717 /* cmplt */, AArch64::CMPLT_PPzZI_H, Convert__SVEPredicateHReg1_0__SVEPredicate3bAnyReg1_1__SVEVectorHReg1_4__SImm51_5, AMFBS_HasSVE, { MCK_SVEPredicateHReg, MCK_SVEPredicate3bAnyReg, MCK__47_, MCK_z, MCK_SVEVectorHReg, MCK_SImm5 }, },
20677   { 717 /* cmplt */, AArch64::CMPLT_PPzZI_S, Convert__SVEPredicateSReg1_0__SVEPredicate3bAnyReg1_1__SVEVectorSReg1_4__SImm51_5, AMFBS_HasSVE, { MCK_SVEPredicateSReg, MCK_SVEPredicate3bAnyReg, MCK__47_, MCK_z, MCK_SVEVectorSReg, MCK_SImm5 }, },
20680   { 717 /* cmplt */, AArch64::CMPLT_PPzZI_D, Convert__SVEPredicateDReg1_0__SVEPredicate3bAnyReg1_1__SVEVectorDReg1_4__SImm51_5, AMFBS_HasSVE, { MCK_SVEPredicateDReg, MCK_SVEPredicate3bAnyReg, MCK__47_, MCK_z, MCK_SVEVectorDReg, MCK_SImm5 }, },
20682   { 717 /* cmplt */, AArch64::CMPLT_PPzZI_B, Convert__SVEPredicateBReg1_0__SVEPredicate3bAnyReg1_1__SVEVectorBReg1_4__SImm51_5, AMFBS_HasSVE, { MCK_SVEPredicateBReg, MCK_SVEPredicate3bAnyReg, MCK__47_, MCK_z, MCK_SVEVectorBReg, MCK_SImm5 }, },
20685   { 723 /* cmpne */, AArch64::CMPNE_PPzZI_H, Convert__SVEPredicateHReg1_0__SVEPredicate3bAnyReg1_1__SVEVectorHReg1_4__SImm51_5, AMFBS_HasSVE, { MCK_SVEPredicateHReg, MCK_SVEPredicate3bAnyReg, MCK__47_, MCK_z, MCK_SVEVectorHReg, MCK_SImm5 }, },
20688   { 723 /* cmpne */, AArch64::CMPNE_PPzZI_S, Convert__SVEPredicateSReg1_0__SVEPredicate3bAnyReg1_1__SVEVectorSReg1_4__SImm51_5, AMFBS_HasSVE, { MCK_SVEPredicateSReg, MCK_SVEPredicate3bAnyReg, MCK__47_, MCK_z, MCK_SVEVectorSReg, MCK_SImm5 }, },
20691   { 723 /* cmpne */, AArch64::CMPNE_PPzZI_D, Convert__SVEPredicateDReg1_0__SVEPredicate3bAnyReg1_1__SVEVectorDReg1_4__SImm51_5, AMFBS_HasSVE, { MCK_SVEPredicateDReg, MCK_SVEPredicate3bAnyReg, MCK__47_, MCK_z, MCK_SVEVectorDReg, MCK_SImm5 }, },
20693   { 723 /* cmpne */, AArch64::CMPNE_PPzZI_B, Convert__SVEPredicateBReg1_0__SVEPredicate3bAnyReg1_1__SVEVectorBReg1_4__SImm51_5, AMFBS_HasSVE, { MCK_SVEPredicateBReg, MCK_SVEPredicate3bAnyReg, MCK__47_, MCK_z, MCK_SVEVectorBReg, MCK_SImm5 }, },
22015   { 1819 /* index */, AArch64::INDEX_RI_H, Convert__SVEVectorHReg1_0__Reg1_1__SImm51_2, AMFBS_HasSVE, { MCK_SVEVectorHReg, MCK_GPR32, MCK_SImm5 }, },
22016   { 1819 /* index */, AArch64::INDEX_IR_H, Convert__SVEVectorHReg1_0__SImm51_1__Reg1_2, AMFBS_HasSVE, { MCK_SVEVectorHReg, MCK_SImm5, MCK_GPR32 }, },
22017   { 1819 /* index */, AArch64::INDEX_II_H, Convert__SVEVectorHReg1_0__SImm51_1__SImm51_2, AMFBS_HasSVE, { MCK_SVEVectorHReg, MCK_SImm5, MCK_SImm5 }, },
22017   { 1819 /* index */, AArch64::INDEX_II_H, Convert__SVEVectorHReg1_0__SImm51_1__SImm51_2, AMFBS_HasSVE, { MCK_SVEVectorHReg, MCK_SImm5, MCK_SImm5 }, },
22019   { 1819 /* index */, AArch64::INDEX_RI_S, Convert__SVEVectorSReg1_0__Reg1_1__SImm51_2, AMFBS_HasSVE, { MCK_SVEVectorSReg, MCK_GPR32, MCK_SImm5 }, },
22020   { 1819 /* index */, AArch64::INDEX_IR_S, Convert__SVEVectorSReg1_0__SImm51_1__Reg1_2, AMFBS_HasSVE, { MCK_SVEVectorSReg, MCK_SImm5, MCK_GPR32 }, },
22021   { 1819 /* index */, AArch64::INDEX_II_S, Convert__SVEVectorSReg1_0__SImm51_1__SImm51_2, AMFBS_HasSVE, { MCK_SVEVectorSReg, MCK_SImm5, MCK_SImm5 }, },
22021   { 1819 /* index */, AArch64::INDEX_II_S, Convert__SVEVectorSReg1_0__SImm51_1__SImm51_2, AMFBS_HasSVE, { MCK_SVEVectorSReg, MCK_SImm5, MCK_SImm5 }, },
22023   { 1819 /* index */, AArch64::INDEX_RI_D, Convert__SVEVectorDReg1_0__Reg1_1__SImm51_2, AMFBS_HasSVE, { MCK_SVEVectorDReg, MCK_GPR64, MCK_SImm5 }, },
22024   { 1819 /* index */, AArch64::INDEX_IR_D, Convert__SVEVectorDReg1_0__SImm51_1__Reg1_2, AMFBS_HasSVE, { MCK_SVEVectorDReg, MCK_SImm5, MCK_GPR64 }, },
22025   { 1819 /* index */, AArch64::INDEX_II_D, Convert__SVEVectorDReg1_0__SImm51_1__SImm51_2, AMFBS_HasSVE, { MCK_SVEVectorDReg, MCK_SImm5, MCK_SImm5 }, },
22025   { 1819 /* index */, AArch64::INDEX_II_D, Convert__SVEVectorDReg1_0__SImm51_1__SImm51_2, AMFBS_HasSVE, { MCK_SVEVectorDReg, MCK_SImm5, MCK_SImm5 }, },
22027   { 1819 /* index */, AArch64::INDEX_RI_B, Convert__SVEVectorBReg1_0__Reg1_1__SImm51_2, AMFBS_HasSVE, { MCK_SVEVectorBReg, MCK_GPR32, MCK_SImm5 }, },
22028   { 1819 /* index */, AArch64::INDEX_IR_B, Convert__SVEVectorBReg1_0__SImm51_1__Reg1_2, AMFBS_HasSVE, { MCK_SVEVectorBReg, MCK_SImm5, MCK_GPR32 }, },
22029   { 1819 /* index */, AArch64::INDEX_II_B, Convert__SVEVectorBReg1_0__SImm51_1__SImm51_2, AMFBS_HasSVE, { MCK_SVEVectorBReg, MCK_SImm5, MCK_SImm5 }, },
22029   { 1819 /* index */, AArch64::INDEX_II_B, Convert__SVEVectorBReg1_0__SImm51_1__SImm51_2, AMFBS_HasSVE, { MCK_SVEVectorBReg, MCK_SImm5, MCK_SImm5 }, },