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reference, declaration → definition
definition → references, declarations, derived classes, virtual overrides
reference to multiple definitions → definitions
unreferenced
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References
gen/lib/Target/AArch64/AArch64GenAsmMatcher.inc 9447 case MCK_SImm4s3: {
12039 case MCK_SImm4s3: return "MCK_SImm4s3";
15502 { 2007 /* ld3b */, AArch64::LD3B_IMM, Convert__SVEVectorList381_0__SVEPredicate3bAnyReg1_1__Reg1_5__SImm4s31_6, AMFBS_HasSVE, { MCK_SVEVectorList38, MCK_SVEPredicate3bAnyReg, MCK__47_, MCK_z, MCK__91_, MCK_GPR64sp, MCK_SImm4s3, MCK_mul, MCK_vl, MCK__93_ }, },
15505 { 2012 /* ld3d */, AArch64::LD3D_IMM, Convert__SVEVectorList3641_0__SVEPredicate3bAnyReg1_1__Reg1_5__SImm4s31_6, AMFBS_HasSVE, { MCK_SVEVectorList364, MCK_SVEPredicate3bAnyReg, MCK__47_, MCK_z, MCK__91_, MCK_GPR64sp, MCK_SImm4s3, MCK_mul, MCK_vl, MCK__93_ }, },
15508 { 2017 /* ld3h */, AArch64::LD3H_IMM, Convert__SVEVectorList3161_0__SVEPredicate3bAnyReg1_1__Reg1_5__SImm4s31_6, AMFBS_HasSVE, { MCK_SVEVectorList316, MCK_SVEPredicate3bAnyReg, MCK__47_, MCK_z, MCK__91_, MCK_GPR64sp, MCK_SImm4s3, MCK_mul, MCK_vl, MCK__93_ }, },
15559 { 2027 /* ld3w */, AArch64::LD3W_IMM, Convert__SVEVectorList3321_0__SVEPredicate3bAnyReg1_1__Reg1_5__SImm4s31_6, AMFBS_HasSVE, { MCK_SVEVectorList332, MCK_SVEPredicate3bAnyReg, MCK__47_, MCK_z, MCK__91_, MCK_GPR64sp, MCK_SImm4s3, MCK_mul, MCK_vl, MCK__93_ }, },
18559 { 5291 /* st3b */, AArch64::ST3B_IMM, Convert__SVEVectorList381_0__SVEPredicate3bAnyReg1_1__Reg1_3__SImm4s31_4, AMFBS_HasSVE, { MCK_SVEVectorList38, MCK_SVEPredicate3bAnyReg, MCK__91_, MCK_GPR64sp, MCK_SImm4s3, MCK_mul, MCK_vl, MCK__93_ }, },
18562 { 5296 /* st3d */, AArch64::ST3D_IMM, Convert__SVEVectorList3641_0__SVEPredicate3bAnyReg1_1__Reg1_3__SImm4s31_4, AMFBS_HasSVE, { MCK_SVEVectorList364, MCK_SVEPredicate3bAnyReg, MCK__91_, MCK_GPR64sp, MCK_SImm4s3, MCK_mul, MCK_vl, MCK__93_ }, },
18565 { 5301 /* st3h */, AArch64::ST3H_IMM, Convert__SVEVectorList3161_0__SVEPredicate3bAnyReg1_1__Reg1_3__SImm4s31_4, AMFBS_HasSVE, { MCK_SVEVectorList316, MCK_SVEPredicate3bAnyReg, MCK__91_, MCK_GPR64sp, MCK_SImm4s3, MCK_mul, MCK_vl, MCK__93_ }, },
18568 { 5306 /* st3w */, AArch64::ST3W_IMM, Convert__SVEVectorList3321_0__SVEPredicate3bAnyReg1_1__Reg1_3__SImm4s31_4, AMFBS_HasSVE, { MCK_SVEVectorList332, MCK_SVEPredicate3bAnyReg, MCK__91_, MCK_GPR64sp, MCK_SImm4s3, MCK_mul, MCK_vl, MCK__93_ }, },
22860 { 2007 /* ld3b */, AArch64::LD3B_IMM, Convert__SVEVectorList381_0__SVEPredicate3bAnyReg1_1__Reg1_5__SImm4s31_6, AMFBS_HasSVE, { MCK_SVEVectorList38, MCK_SVEPredicate3bAnyReg, MCK__47_, MCK_z, MCK__91_, MCK_GPR64sp, MCK_SImm4s3, MCK_mul, MCK_vl, MCK__93_ }, },
22863 { 2012 /* ld3d */, AArch64::LD3D_IMM, Convert__SVEVectorList3641_0__SVEPredicate3bAnyReg1_1__Reg1_5__SImm4s31_6, AMFBS_HasSVE, { MCK_SVEVectorList364, MCK_SVEPredicate3bAnyReg, MCK__47_, MCK_z, MCK__91_, MCK_GPR64sp, MCK_SImm4s3, MCK_mul, MCK_vl, MCK__93_ }, },
22866 { 2017 /* ld3h */, AArch64::LD3H_IMM, Convert__SVEVectorList3161_0__SVEPredicate3bAnyReg1_1__Reg1_5__SImm4s31_6, AMFBS_HasSVE, { MCK_SVEVectorList316, MCK_SVEPredicate3bAnyReg, MCK__47_, MCK_z, MCK__91_, MCK_GPR64sp, MCK_SImm4s3, MCK_mul, MCK_vl, MCK__93_ }, },
22917 { 2027 /* ld3w */, AArch64::LD3W_IMM, Convert__SVEVectorList3321_0__SVEPredicate3bAnyReg1_1__Reg1_5__SImm4s31_6, AMFBS_HasSVE, { MCK_SVEVectorList332, MCK_SVEPredicate3bAnyReg, MCK__47_, MCK_z, MCK__91_, MCK_GPR64sp, MCK_SImm4s3, MCK_mul, MCK_vl, MCK__93_ }, },
25917 { 5291 /* st3b */, AArch64::ST3B_IMM, Convert__SVEVectorList381_0__SVEPredicate3bAnyReg1_1__Reg1_3__SImm4s31_4, AMFBS_HasSVE, { MCK_SVEVectorList38, MCK_SVEPredicate3bAnyReg, MCK__91_, MCK_GPR64sp, MCK_SImm4s3, MCK_mul, MCK_vl, MCK__93_ }, },
25920 { 5296 /* st3d */, AArch64::ST3D_IMM, Convert__SVEVectorList3641_0__SVEPredicate3bAnyReg1_1__Reg1_3__SImm4s31_4, AMFBS_HasSVE, { MCK_SVEVectorList364, MCK_SVEPredicate3bAnyReg, MCK__91_, MCK_GPR64sp, MCK_SImm4s3, MCK_mul, MCK_vl, MCK__93_ }, },
25923 { 5301 /* st3h */, AArch64::ST3H_IMM, Convert__SVEVectorList3161_0__SVEPredicate3bAnyReg1_1__Reg1_3__SImm4s31_4, AMFBS_HasSVE, { MCK_SVEVectorList316, MCK_SVEPredicate3bAnyReg, MCK__91_, MCK_GPR64sp, MCK_SImm4s3, MCK_mul, MCK_vl, MCK__93_ }, },
25926 { 5306 /* st3w */, AArch64::ST3W_IMM, Convert__SVEVectorList3321_0__SVEPredicate3bAnyReg1_1__Reg1_3__SImm4s31_4, AMFBS_HasSVE, { MCK_SVEVectorList332, MCK_SVEPredicate3bAnyReg, MCK__91_, MCK_GPR64sp, MCK_SImm4s3, MCK_mul, MCK_vl, MCK__93_ }, },