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reference, declaration → definition
definition → references, declarations, derived classes, virtual overrides
reference to multiple definitions → definitions
unreferenced
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References
gen/lib/Target/AArch64/AArch64GenAsmMatcher.inc 9438 case MCK_SImm4s2: {
12038 case MCK_SImm4s2: return "MCK_SImm4s2";
15376 { 1978 /* ld2b */, AArch64::LD2B_IMM, Convert__SVEVectorList281_0__SVEPredicate3bAnyReg1_1__Reg1_5__SImm4s21_6, AMFBS_HasSVE, { MCK_SVEVectorList28, MCK_SVEPredicate3bAnyReg, MCK__47_, MCK_z, MCK__91_, MCK_GPR64sp, MCK_SImm4s2, MCK_mul, MCK_vl, MCK__93_ }, },
15379 { 1983 /* ld2d */, AArch64::LD2D_IMM, Convert__SVEVectorList2641_0__SVEPredicate3bAnyReg1_1__Reg1_5__SImm4s21_6, AMFBS_HasSVE, { MCK_SVEVectorList264, MCK_SVEPredicate3bAnyReg, MCK__47_, MCK_z, MCK__91_, MCK_GPR64sp, MCK_SImm4s2, MCK_mul, MCK_vl, MCK__93_ }, },
15382 { 1988 /* ld2h */, AArch64::LD2H_IMM, Convert__SVEVectorList2161_0__SVEPredicate3bAnyReg1_1__Reg1_5__SImm4s21_6, AMFBS_HasSVE, { MCK_SVEVectorList216, MCK_SVEPredicate3bAnyReg, MCK__47_, MCK_z, MCK__91_, MCK_GPR64sp, MCK_SImm4s2, MCK_mul, MCK_vl, MCK__93_ }, },
15433 { 1998 /* ld2w */, AArch64::LD2W_IMM, Convert__SVEVectorList2321_0__SVEPredicate3bAnyReg1_1__Reg1_5__SImm4s21_6, AMFBS_HasSVE, { MCK_SVEVectorList232, MCK_SVEPredicate3bAnyReg, MCK__47_, MCK_z, MCK__91_, MCK_GPR64sp, MCK_SImm4s2, MCK_mul, MCK_vl, MCK__93_ }, },
18477 { 5262 /* st2b */, AArch64::ST2B_IMM, Convert__SVEVectorList281_0__SVEPredicate3bAnyReg1_1__Reg1_3__SImm4s21_4, AMFBS_HasSVE, { MCK_SVEVectorList28, MCK_SVEPredicate3bAnyReg, MCK__91_, MCK_GPR64sp, MCK_SImm4s2, MCK_mul, MCK_vl, MCK__93_ }, },
18480 { 5267 /* st2d */, AArch64::ST2D_IMM, Convert__SVEVectorList2641_0__SVEPredicate3bAnyReg1_1__Reg1_3__SImm4s21_4, AMFBS_HasSVE, { MCK_SVEVectorList264, MCK_SVEPredicate3bAnyReg, MCK__91_, MCK_GPR64sp, MCK_SImm4s2, MCK_mul, MCK_vl, MCK__93_ }, },
18487 { 5277 /* st2h */, AArch64::ST2H_IMM, Convert__SVEVectorList2161_0__SVEPredicate3bAnyReg1_1__Reg1_3__SImm4s21_4, AMFBS_HasSVE, { MCK_SVEVectorList216, MCK_SVEPredicate3bAnyReg, MCK__91_, MCK_GPR64sp, MCK_SImm4s2, MCK_mul, MCK_vl, MCK__93_ }, },
18490 { 5282 /* st2w */, AArch64::ST2W_IMM, Convert__SVEVectorList2321_0__SVEPredicate3bAnyReg1_1__Reg1_3__SImm4s21_4, AMFBS_HasSVE, { MCK_SVEVectorList232, MCK_SVEPredicate3bAnyReg, MCK__91_, MCK_GPR64sp, MCK_SImm4s2, MCK_mul, MCK_vl, MCK__93_ }, },
22734 { 1978 /* ld2b */, AArch64::LD2B_IMM, Convert__SVEVectorList281_0__SVEPredicate3bAnyReg1_1__Reg1_5__SImm4s21_6, AMFBS_HasSVE, { MCK_SVEVectorList28, MCK_SVEPredicate3bAnyReg, MCK__47_, MCK_z, MCK__91_, MCK_GPR64sp, MCK_SImm4s2, MCK_mul, MCK_vl, MCK__93_ }, },
22737 { 1983 /* ld2d */, AArch64::LD2D_IMM, Convert__SVEVectorList2641_0__SVEPredicate3bAnyReg1_1__Reg1_5__SImm4s21_6, AMFBS_HasSVE, { MCK_SVEVectorList264, MCK_SVEPredicate3bAnyReg, MCK__47_, MCK_z, MCK__91_, MCK_GPR64sp, MCK_SImm4s2, MCK_mul, MCK_vl, MCK__93_ }, },
22740 { 1988 /* ld2h */, AArch64::LD2H_IMM, Convert__SVEVectorList2161_0__SVEPredicate3bAnyReg1_1__Reg1_5__SImm4s21_6, AMFBS_HasSVE, { MCK_SVEVectorList216, MCK_SVEPredicate3bAnyReg, MCK__47_, MCK_z, MCK__91_, MCK_GPR64sp, MCK_SImm4s2, MCK_mul, MCK_vl, MCK__93_ }, },
22791 { 1998 /* ld2w */, AArch64::LD2W_IMM, Convert__SVEVectorList2321_0__SVEPredicate3bAnyReg1_1__Reg1_5__SImm4s21_6, AMFBS_HasSVE, { MCK_SVEVectorList232, MCK_SVEPredicate3bAnyReg, MCK__47_, MCK_z, MCK__91_, MCK_GPR64sp, MCK_SImm4s2, MCK_mul, MCK_vl, MCK__93_ }, },
25835 { 5262 /* st2b */, AArch64::ST2B_IMM, Convert__SVEVectorList281_0__SVEPredicate3bAnyReg1_1__Reg1_3__SImm4s21_4, AMFBS_HasSVE, { MCK_SVEVectorList28, MCK_SVEPredicate3bAnyReg, MCK__91_, MCK_GPR64sp, MCK_SImm4s2, MCK_mul, MCK_vl, MCK__93_ }, },
25838 { 5267 /* st2d */, AArch64::ST2D_IMM, Convert__SVEVectorList2641_0__SVEPredicate3bAnyReg1_1__Reg1_3__SImm4s21_4, AMFBS_HasSVE, { MCK_SVEVectorList264, MCK_SVEPredicate3bAnyReg, MCK__91_, MCK_GPR64sp, MCK_SImm4s2, MCK_mul, MCK_vl, MCK__93_ }, },
25845 { 5277 /* st2h */, AArch64::ST2H_IMM, Convert__SVEVectorList2161_0__SVEPredicate3bAnyReg1_1__Reg1_3__SImm4s21_4, AMFBS_HasSVE, { MCK_SVEVectorList216, MCK_SVEPredicate3bAnyReg, MCK__91_, MCK_GPR64sp, MCK_SImm4s2, MCK_mul, MCK_vl, MCK__93_ }, },
25848 { 5282 /* st2w */, AArch64::ST2W_IMM, Convert__SVEVectorList2321_0__SVEPredicate3bAnyReg1_1__Reg1_3__SImm4s21_4, AMFBS_HasSVE, { MCK_SVEVectorList232, MCK_SVEPredicate3bAnyReg, MCK__91_, MCK_GPR64sp, MCK_SImm4s2, MCK_mul, MCK_vl, MCK__93_ }, },