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reference, declaration → definition
definition → references, declarations, derived classes, virtual overrides
reference to multiple definitions → definitions
unreferenced
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References
gen/lib/Target/AArch64/AArch64GenAsmMatcher.inc 8774 case MCK_LogicalShifter32:
9730 case MCK_LogicalShifter32: {
12072 case MCK_LogicalShifter32: return "MCK_LogicalShifter32";
12822 { 120 /* and */, AArch64::ANDWrs, Convert__Reg1_0__Reg1_1__Reg1_2__LogicalShifter321_3, AMFBS_None, { MCK_GPR32, MCK_GPR32, MCK_GPR32, MCK_LogicalShifter32 }, },
12835 { 124 /* ands */, AArch64::ANDSWrs, Convert__Reg1_0__Reg1_1__Reg1_2__LogicalShifter321_3, AMFBS_None, { MCK_GPR32, MCK_GPR32, MCK_GPR32, MCK_LogicalShifter32 }, },
12930 { 288 /* bic */, AArch64::BICWrs, Convert__Reg1_0__Reg1_1__Reg1_2__LogicalShifter321_3, AMFBS_None, { MCK_GPR32, MCK_GPR32, MCK_GPR32, MCK_LogicalShifter32 }, },
12947 { 292 /* bics */, AArch64::BICSWrs, Convert__Reg1_0__Reg1_1__Reg1_2__LogicalShifter321_3, AMFBS_None, { MCK_GPR32, MCK_GPR32, MCK_GPR32, MCK_LogicalShifter32 }, },
13501 { 971 /* eon */, AArch64::EONWrs, Convert__Reg1_0__Reg1_1__Reg1_2__LogicalShifter321_3, AMFBS_None, { MCK_GPR32, MCK_GPR32, MCK_GPR32, MCK_LogicalShifter32 }, },
13515 { 975 /* eor */, AArch64::EORWrs, Convert__Reg1_0__Reg1_1__Reg1_2__LogicalShifter321_3, AMFBS_None, { MCK_GPR32, MCK_GPR32, MCK_GPR32, MCK_LogicalShifter32 }, },
16702 { 3414 /* mvn */, AArch64::ORNWrs, Convert__Reg1_0__regWZR__Reg1_1__LogicalShifter321_2, AMFBS_None, { MCK_GPR32, MCK_GPR32, MCK_LogicalShifter32 }, },
16768 { 3486 /* orn */, AArch64::ORNWrs, Convert__Reg1_0__Reg1_1__Reg1_2__LogicalShifter321_3, AMFBS_None, { MCK_GPR32, MCK_GPR32, MCK_GPR32, MCK_LogicalShifter32 }, },
16794 { 3495 /* orr */, AArch64::ORRWrs, Convert__Reg1_0__Reg1_1__Reg1_2__LogicalShifter321_3, AMFBS_None, { MCK_GPR32, MCK_GPR32, MCK_GPR32, MCK_LogicalShifter32 }, },
19167 { 6158 /* tst */, AArch64::ANDSWrs, Convert__regWZR__Reg1_0__Reg1_1__LogicalShifter321_2, AMFBS_None, { MCK_GPR32, MCK_GPR32, MCK_LogicalShifter32 }, },
20182 { 120 /* and */, AArch64::ANDWrs, Convert__Reg1_0__Reg1_1__Reg1_2__LogicalShifter321_3, AMFBS_None, { MCK_GPR32, MCK_GPR32, MCK_GPR32, MCK_LogicalShifter32 }, },
20193 { 124 /* ands */, AArch64::ANDSWrs, Convert__Reg1_0__Reg1_1__Reg1_2__LogicalShifter321_3, AMFBS_None, { MCK_GPR32, MCK_GPR32, MCK_GPR32, MCK_LogicalShifter32 }, },
20294 { 288 /* bic */, AArch64::BICWrs, Convert__Reg1_0__Reg1_1__Reg1_2__LogicalShifter321_3, AMFBS_None, { MCK_GPR32, MCK_GPR32, MCK_GPR32, MCK_LogicalShifter32 }, },
20305 { 292 /* bics */, AArch64::BICSWrs, Convert__Reg1_0__Reg1_1__Reg1_2__LogicalShifter321_3, AMFBS_None, { MCK_GPR32, MCK_GPR32, MCK_GPR32, MCK_LogicalShifter32 }, },
20859 { 971 /* eon */, AArch64::EONWrs, Convert__Reg1_0__Reg1_1__Reg1_2__LogicalShifter321_3, AMFBS_None, { MCK_GPR32, MCK_GPR32, MCK_GPR32, MCK_LogicalShifter32 }, },
20875 { 975 /* eor */, AArch64::EORWrs, Convert__Reg1_0__Reg1_1__Reg1_2__LogicalShifter321_3, AMFBS_None, { MCK_GPR32, MCK_GPR32, MCK_GPR32, MCK_LogicalShifter32 }, },
24062 { 3414 /* mvn */, AArch64::ORNWrs, Convert__Reg1_0__regWZR__Reg1_1__LogicalShifter321_2, AMFBS_None, { MCK_GPR32, MCK_GPR32, MCK_LogicalShifter32 }, },
24128 { 3486 /* orn */, AArch64::ORNWrs, Convert__Reg1_0__Reg1_1__Reg1_2__LogicalShifter321_3, AMFBS_None, { MCK_GPR32, MCK_GPR32, MCK_GPR32, MCK_LogicalShifter32 }, },
24158 { 3495 /* orr */, AArch64::ORRWrs, Convert__Reg1_0__Reg1_1__Reg1_2__LogicalShifter321_3, AMFBS_None, { MCK_GPR32, MCK_GPR32, MCK_GPR32, MCK_LogicalShifter32 }, },
26525 { 6158 /* tst */, AArch64::ANDSWrs, Convert__regWZR__Reg1_0__Reg1_1__LogicalShifter321_2, AMFBS_None, { MCK_GPR32, MCK_GPR32, MCK_LogicalShifter32 }, },