reference, declaration → definition definition → references, declarations, derived classes, virtual overrides reference to multiple definitions → definitions unreferenced |
9137 case MCK_LogicalImm64Not: { 12003 case MCK_LogicalImm64Not: return "MCK_LogicalImm64Not"; 12917 { 288 /* bic */, AArch64::ANDXri, Convert__Reg1_0__Reg1_1__LogicalImm64Not1_2, AMFBS_UseNegativeImmediates, { MCK_GPR64sp, MCK_GPR64, MCK_LogicalImm64Not }, }, 12926 { 288 /* bic */, AArch64::AND_ZI, Convert__SVEVectorDReg1_0__Tie0_1_2__LogicalImm64Not1_2, AMFBS_HasSVE, { MCK_SVEVectorDReg, MCK_SVEVectorDReg, MCK_LogicalImm64Not }, }, 12946 { 292 /* bics */, AArch64::ANDSXri, Convert__Reg1_0__Reg1_1__LogicalImm64Not1_2, AMFBS_UseNegativeImmediates, { MCK_GPR64, MCK_GPR64, MCK_LogicalImm64Not }, }, 13496 { 971 /* eon */, AArch64::EORXri, Convert__Reg1_0__Reg1_1__LogicalImm64Not1_2, AMFBS_UseNegativeImmediates, { MCK_GPR64sp, MCK_GPR64, MCK_LogicalImm64Not }, }, 13499 { 971 /* eon */, AArch64::EOR_ZI, Convert__SVEVectorDReg1_0__Tie0_1_2__LogicalImm64Not1_2, AMFBS_HasSVE, { MCK_SVEVectorDReg, MCK_SVEVectorDReg, MCK_LogicalImm64Not }, }, 16763 { 3486 /* orn */, AArch64::ORRXri, Convert__Reg1_0__Reg1_1__LogicalImm64Not1_2, AMFBS_UseNegativeImmediates, { MCK_GPR64sp, MCK_GPR64, MCK_LogicalImm64Not }, }, 16766 { 3486 /* orn */, AArch64::ORR_ZI, Convert__SVEVectorDReg1_0__Tie0_1_2__LogicalImm64Not1_2, AMFBS_HasSVE, { MCK_SVEVectorDReg, MCK_SVEVectorDReg, MCK_LogicalImm64Not }, }, 20275 { 288 /* bic */, AArch64::ANDXri, Convert__Reg1_0__Reg1_1__LogicalImm64Not1_2, AMFBS_UseNegativeImmediates, { MCK_GPR64sp, MCK_GPR64, MCK_LogicalImm64Not }, }, 20284 { 288 /* bic */, AArch64::AND_ZI, Convert__SVEVectorDReg1_0__Tie0_1_2__LogicalImm64Not1_2, AMFBS_HasSVE, { MCK_SVEVectorDReg, MCK_SVEVectorDReg, MCK_LogicalImm64Not }, }, 20304 { 292 /* bics */, AArch64::ANDSXri, Convert__Reg1_0__Reg1_1__LogicalImm64Not1_2, AMFBS_UseNegativeImmediates, { MCK_GPR64, MCK_GPR64, MCK_LogicalImm64Not }, }, 20854 { 971 /* eon */, AArch64::EORXri, Convert__Reg1_0__Reg1_1__LogicalImm64Not1_2, AMFBS_UseNegativeImmediates, { MCK_GPR64sp, MCK_GPR64, MCK_LogicalImm64Not }, }, 20857 { 971 /* eon */, AArch64::EOR_ZI, Convert__SVEVectorDReg1_0__Tie0_1_2__LogicalImm64Not1_2, AMFBS_HasSVE, { MCK_SVEVectorDReg, MCK_SVEVectorDReg, MCK_LogicalImm64Not }, }, 24121 { 3486 /* orn */, AArch64::ORRXri, Convert__Reg1_0__Reg1_1__LogicalImm64Not1_2, AMFBS_UseNegativeImmediates, { MCK_GPR64sp, MCK_GPR64, MCK_LogicalImm64Not }, }, 24124 { 3486 /* orn */, AArch64::ORR_ZI, Convert__SVEVectorDReg1_0__Tie0_1_2__LogicalImm64Not1_2, AMFBS_HasSVE, { MCK_SVEVectorDReg, MCK_SVEVectorDReg, MCK_LogicalImm64Not }, },