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reference, declaration → definition
definition → references, declarations, derived classes, virtual overrides
reference to multiple definitions → definitions
unreferenced
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References
gen/lib/Target/AArch64/AArch64GenAsmMatcher.inc 9022 case MCK_Imm0_15: {
11990 case MCK_Imm0_15: return "MCK_Imm0_15";
12739 { 29 /* addg */, AArch64::ADDG, Convert__Reg1_0__Reg1_1__UImm6s161_2__Imm0_151_3, AMFBS_HasMTE, { MCK_GPR64sp, MCK_GPR64sp, MCK_UImm6s16, MCK_Imm0_15 }, },
13017 { 552 /* ccmn */, AArch64::CCMNWr, Convert__Reg1_0__Reg1_1__Imm0_151_2__CondCode1_3, AMFBS_None, { MCK_GPR32, MCK_GPR32, MCK_Imm0_15, MCK_CondCode }, },
13018 { 552 /* ccmn */, AArch64::CCMNWi, Convert__Reg1_0__Imm0_311_1__Imm0_151_2__CondCode1_3, AMFBS_None, { MCK_GPR32, MCK_Imm0_31, MCK_Imm0_15, MCK_CondCode }, },
13019 { 552 /* ccmn */, AArch64::CCMNXr, Convert__Reg1_0__Reg1_1__Imm0_151_2__CondCode1_3, AMFBS_None, { MCK_GPR64, MCK_GPR64, MCK_Imm0_15, MCK_CondCode }, },
13020 { 552 /* ccmn */, AArch64::CCMNXi, Convert__Reg1_0__Imm0_311_1__Imm0_151_2__CondCode1_3, AMFBS_None, { MCK_GPR64, MCK_Imm0_31, MCK_Imm0_15, MCK_CondCode }, },
13021 { 557 /* ccmp */, AArch64::CCMPWr, Convert__Reg1_0__Reg1_1__Imm0_151_2__CondCode1_3, AMFBS_None, { MCK_GPR32, MCK_GPR32, MCK_Imm0_15, MCK_CondCode }, },
13022 { 557 /* ccmp */, AArch64::CCMPWi, Convert__Reg1_0__Imm0_311_1__Imm0_151_2__CondCode1_3, AMFBS_None, { MCK_GPR32, MCK_Imm0_31, MCK_Imm0_15, MCK_CondCode }, },
13023 { 557 /* ccmp */, AArch64::CCMPXr, Convert__Reg1_0__Reg1_1__Imm0_151_2__CondCode1_3, AMFBS_None, { MCK_GPR64, MCK_GPR64, MCK_Imm0_15, MCK_CondCode }, },
13024 { 557 /* ccmp */, AArch64::CCMPXi, Convert__Reg1_0__Imm0_311_1__Imm0_151_2__CondCode1_3, AMFBS_None, { MCK_GPR64, MCK_Imm0_31, MCK_Imm0_15, MCK_CondCode }, },
13059 { 597 /* clrex */, AArch64::CLREX, Convert__Imm0_151_0, AMFBS_None, { MCK_Imm0_15 }, },
13658 { 1101 /* fccmp */, AArch64::FCCMPHrr, Convert__Reg1_0__Reg1_1__Imm0_151_2__CondCode1_3, AMFBS_HasFullFP16, { MCK_FPR16, MCK_FPR16, MCK_Imm0_15, MCK_CondCode }, },
13659 { 1101 /* fccmp */, AArch64::FCCMPSrr, Convert__Reg1_0__Reg1_1__Imm0_151_2__CondCode1_3, AMFBS_HasFPARMv8, { MCK_FPR32, MCK_FPR32, MCK_Imm0_15, MCK_CondCode }, },
13660 { 1101 /* fccmp */, AArch64::FCCMPDrr, Convert__Reg1_0__Reg1_1__Imm0_151_2__CondCode1_3, AMFBS_HasFPARMv8, { MCK_FPR64, MCK_FPR64, MCK_Imm0_15, MCK_CondCode }, },
13661 { 1107 /* fccmpe */, AArch64::FCCMPEHrr, Convert__Reg1_0__Reg1_1__Imm0_151_2__CondCode1_3, AMFBS_HasFullFP16, { MCK_FPR16, MCK_FPR16, MCK_Imm0_15, MCK_CondCode }, },
13662 { 1107 /* fccmpe */, AArch64::FCCMPESrr, Convert__Reg1_0__Reg1_1__Imm0_151_2__CondCode1_3, AMFBS_HasFPARMv8, { MCK_FPR32, MCK_FPR32, MCK_Imm0_15, MCK_CondCode }, },
13663 { 1107 /* fccmpe */, AArch64::FCCMPEDrr, Convert__Reg1_0__Reg1_1__Imm0_151_2__CondCode1_3, AMFBS_HasFPARMv8, { MCK_FPR64, MCK_FPR64, MCK_Imm0_15, MCK_CondCode }, },
16421 { 3300 /* lsl */, AArch64::LSL_ZZI_H, Convert__SVEVectorHReg1_0__SVEVectorHReg1_1__Imm0_151_2, AMFBS_HasSVE, { MCK_SVEVectorHReg, MCK_SVEVectorHReg, MCK_Imm0_15 }, },
16428 { 3300 /* lsl */, AArch64::LSL_ZPmI_H, Convert__SVEVectorHReg1_0__SVEPredicate3bAnyReg1_1__Tie0_1_5__Imm0_151_5, AMFBS_HasSVE, { MCK_SVEVectorHReg, MCK_SVEPredicate3bAnyReg, MCK__47_, MCK_m, MCK_SVEVectorHReg, MCK_Imm0_15 }, },
16669 { 3401 /* msr */, AArch64::MSRpstateImm4, Convert__SystemPStateFieldWithImm0_151_0__Imm0_151_1, AMFBS_None, { MCK_SystemPStateFieldWithImm0_15, MCK_Imm0_15 }, },
16985 { 3856 /* rmif */, AArch64::RMIF, Convert__Reg1_0__UImm61_1__Imm0_151_2, AMFBS_HasFMI, { MCK_GPR64, MCK_UImm6, MCK_Imm0_15 }, },
17208 { 4285 /* shl */, AArch64::SHLv8i16_shift, Convert__VectorReg1281_0__VectorReg1281_2__Imm0_151_4, AMFBS_HasNEON, { MCK_VectorReg128, MCK__DOT_8h, MCK_VectorReg128, MCK__DOT_8h, MCK_Imm0_15 }, },
17210 { 4285 /* shl */, AArch64::SHLv4i16_shift, Convert__VectorReg641_0__VectorReg641_2__Imm0_151_4, AMFBS_HasNEON, { MCK_VectorReg64, MCK__DOT_4h, MCK_VectorReg64, MCK__DOT_4h, MCK_Imm0_15 }, },
17245 { 4336 /* sli */, AArch64::SLI_ZZI_H, Convert__SVEVectorHReg1_0__Tie0_1_1__SVEVectorHReg1_1__Imm0_151_2, AMFBS_HasSVE2, { MCK_SVEVectorHReg, MCK_SVEVectorHReg, MCK_Imm0_15 }, },
17252 { 4336 /* sli */, AArch64::SLIv8i16_shift, Convert__VectorReg1281_0__Tie0_1_1__VectorReg1281_2__Imm0_151_4, AMFBS_HasNEON, { MCK_VectorReg128, MCK__DOT_8h, MCK_VectorReg128, MCK__DOT_8h, MCK_Imm0_15 }, },
17254 { 4336 /* sli */, AArch64::SLIv4i16_shift, Convert__VectorReg641_0__Tie0_1_1__VectorReg641_2__Imm0_151_4, AMFBS_HasNEON, { MCK_VectorReg64, MCK__DOT_4h, MCK_VectorReg64, MCK__DOT_4h, MCK_Imm0_15 }, },
17775 { 4924 /* sqshl */, AArch64::SQSHLh, Convert__Reg1_0__Reg1_1__Imm0_151_2, AMFBS_HasNEON, { MCK_FPR16, MCK_FPR16, MCK_Imm0_15 }, },
17785 { 4924 /* sqshl */, AArch64::SQSHLv8i16_shift, Convert__VectorReg1281_0__VectorReg1281_2__Imm0_151_4, AMFBS_HasNEON, { MCK_VectorReg128, MCK__DOT_8h, MCK_VectorReg128, MCK__DOT_8h, MCK_Imm0_15 }, },
17787 { 4924 /* sqshl */, AArch64::SQSHLv4i16_shift, Convert__VectorReg641_0__VectorReg641_2__Imm0_151_4, AMFBS_HasNEON, { MCK_VectorReg64, MCK__DOT_4h, MCK_VectorReg64, MCK__DOT_4h, MCK_Imm0_15 }, },
17796 { 4924 /* sqshl */, AArch64::SQSHL_ZPmI_H, Convert__SVEVectorHReg1_0__SVEPredicate3bAnyReg1_1__Tie0_1_5__Imm0_151_5, AMFBS_HasSVE2, { MCK_SVEVectorHReg, MCK_SVEPredicate3bAnyReg, MCK__47_, MCK_m, MCK_SVEVectorHReg, MCK_Imm0_15 }, },
17808 { 4937 /* sqshlu */, AArch64::SQSHLUh, Convert__Reg1_0__Reg1_1__Imm0_151_2, AMFBS_HasNEON, { MCK_FPR16, MCK_FPR16, MCK_Imm0_15 }, },
17815 { 4937 /* sqshlu */, AArch64::SQSHLUv8i16_shift, Convert__VectorReg1281_0__VectorReg1281_2__Imm0_151_4, AMFBS_HasNEON, { MCK_VectorReg128, MCK__DOT_8h, MCK_VectorReg128, MCK__DOT_8h, MCK_Imm0_15 }, },
17817 { 4937 /* sqshlu */, AArch64::SQSHLUv4i16_shift, Convert__VectorReg641_0__VectorReg641_2__Imm0_151_4, AMFBS_HasNEON, { MCK_VectorReg64, MCK__DOT_4h, MCK_VectorReg64, MCK__DOT_4h, MCK_Imm0_15 }, },
17819 { 4937 /* sqshlu */, AArch64::SQSHLU_ZPmI_H, Convert__SVEVectorHReg1_0__SVEPredicate3bAnyReg1_1__Tie0_1_5__Imm0_151_5, AMFBS_HasSVE2, { MCK_SVEVectorHReg, MCK_SVEPredicate3bAnyReg, MCK__47_, MCK_m, MCK_SVEVectorHReg, MCK_Imm0_15 }, },
17982 { 5127 /* sshll */, AArch64::SSHLLv4i16_shift, Convert__VectorReg1281_0__VectorReg641_2__Imm0_151_4, AMFBS_HasNEON, { MCK_VectorReg128, MCK__DOT_4s, MCK_VectorReg64, MCK__DOT_4h, MCK_Imm0_15 }, },
17985 { 5133 /* sshll2 */, AArch64::SSHLLv8i16_shift, Convert__VectorReg1281_0__VectorReg1281_2__Imm0_151_4, AMFBS_HasNEON, { MCK_VectorReg128, MCK__DOT_4s, MCK_VectorReg128, MCK__DOT_8h, MCK_Imm0_15 }, },
17988 { 5140 /* sshllb */, AArch64::SSHLLB_ZZI_S, Convert__SVEVectorSReg1_0__SVEVectorHReg1_1__Imm0_151_2, AMFBS_HasSVE2, { MCK_SVEVectorSReg, MCK_SVEVectorHReg, MCK_Imm0_15 }, },
17991 { 5147 /* sshllt */, AArch64::SSHLLT_ZZI_S, Convert__SVEVectorSReg1_0__SVEVectorHReg1_1__Imm0_151_2, AMFBS_HasSVE2, { MCK_SVEVectorSReg, MCK_SVEVectorHReg, MCK_Imm0_15 }, },
18976 { 5928 /* subg */, AArch64::SUBG, Convert__Reg1_0__Reg1_1__UImm6s161_2__Imm0_151_3, AMFBS_HasMTE, { MCK_GPR64sp, MCK_GPR64sp, MCK_UImm6s16, MCK_Imm0_15 }, },
19634 { 6643 /* uqshl */, AArch64::UQSHLh, Convert__Reg1_0__Reg1_1__Imm0_151_2, AMFBS_HasNEON, { MCK_FPR16, MCK_FPR16, MCK_Imm0_15 }, },
19644 { 6643 /* uqshl */, AArch64::UQSHLv8i16_shift, Convert__VectorReg1281_0__VectorReg1281_2__Imm0_151_4, AMFBS_HasNEON, { MCK_VectorReg128, MCK__DOT_8h, MCK_VectorReg128, MCK__DOT_8h, MCK_Imm0_15 }, },
19646 { 6643 /* uqshl */, AArch64::UQSHLv4i16_shift, Convert__VectorReg641_0__VectorReg641_2__Imm0_151_4, AMFBS_HasNEON, { MCK_VectorReg64, MCK__DOT_4h, MCK_VectorReg64, MCK__DOT_4h, MCK_Imm0_15 }, },
19655 { 6643 /* uqshl */, AArch64::UQSHL_ZPmI_H, Convert__SVEVectorHReg1_0__SVEPredicate3bAnyReg1_1__Tie0_1_5__Imm0_151_5, AMFBS_HasSVE2, { MCK_SVEVectorHReg, MCK_SVEPredicate3bAnyReg, MCK__47_, MCK_m, MCK_SVEVectorHReg, MCK_Imm0_15 }, },
19789 { 6779 /* ushll */, AArch64::USHLLv4i16_shift, Convert__VectorReg1281_0__VectorReg641_2__Imm0_151_4, AMFBS_HasNEON, { MCK_VectorReg128, MCK__DOT_4s, MCK_VectorReg64, MCK__DOT_4h, MCK_Imm0_15 }, },
19792 { 6785 /* ushll2 */, AArch64::USHLLv8i16_shift, Convert__VectorReg1281_0__VectorReg1281_2__Imm0_151_4, AMFBS_HasNEON, { MCK_VectorReg128, MCK__DOT_4s, MCK_VectorReg128, MCK__DOT_8h, MCK_Imm0_15 }, },
19795 { 6792 /* ushllb */, AArch64::USHLLB_ZZI_S, Convert__SVEVectorSReg1_0__SVEVectorHReg1_1__Imm0_151_2, AMFBS_HasSVE2, { MCK_SVEVectorSReg, MCK_SVEVectorHReg, MCK_Imm0_15 }, },
19798 { 6799 /* ushllt */, AArch64::USHLLT_ZZI_S, Convert__SVEVectorSReg1_0__SVEVectorHReg1_1__Imm0_151_2, AMFBS_HasSVE2, { MCK_SVEVectorSReg, MCK_SVEVectorHReg, MCK_Imm0_15 }, },
20097 { 29 /* addg */, AArch64::ADDG, Convert__Reg1_0__Reg1_1__UImm6s161_2__Imm0_151_3, AMFBS_HasMTE, { MCK_GPR64sp, MCK_GPR64sp, MCK_UImm6s16, MCK_Imm0_15 }, },
20375 { 552 /* ccmn */, AArch64::CCMNWr, Convert__Reg1_0__Reg1_1__Imm0_151_2__CondCode1_3, AMFBS_None, { MCK_GPR32, MCK_GPR32, MCK_Imm0_15, MCK_CondCode }, },
20376 { 552 /* ccmn */, AArch64::CCMNWi, Convert__Reg1_0__Imm0_311_1__Imm0_151_2__CondCode1_3, AMFBS_None, { MCK_GPR32, MCK_Imm0_31, MCK_Imm0_15, MCK_CondCode }, },
20377 { 552 /* ccmn */, AArch64::CCMNXr, Convert__Reg1_0__Reg1_1__Imm0_151_2__CondCode1_3, AMFBS_None, { MCK_GPR64, MCK_GPR64, MCK_Imm0_15, MCK_CondCode }, },
20378 { 552 /* ccmn */, AArch64::CCMNXi, Convert__Reg1_0__Imm0_311_1__Imm0_151_2__CondCode1_3, AMFBS_None, { MCK_GPR64, MCK_Imm0_31, MCK_Imm0_15, MCK_CondCode }, },
20379 { 557 /* ccmp */, AArch64::CCMPWr, Convert__Reg1_0__Reg1_1__Imm0_151_2__CondCode1_3, AMFBS_None, { MCK_GPR32, MCK_GPR32, MCK_Imm0_15, MCK_CondCode }, },
20380 { 557 /* ccmp */, AArch64::CCMPWi, Convert__Reg1_0__Imm0_311_1__Imm0_151_2__CondCode1_3, AMFBS_None, { MCK_GPR32, MCK_Imm0_31, MCK_Imm0_15, MCK_CondCode }, },
20381 { 557 /* ccmp */, AArch64::CCMPXr, Convert__Reg1_0__Reg1_1__Imm0_151_2__CondCode1_3, AMFBS_None, { MCK_GPR64, MCK_GPR64, MCK_Imm0_15, MCK_CondCode }, },
20382 { 557 /* ccmp */, AArch64::CCMPXi, Convert__Reg1_0__Imm0_311_1__Imm0_151_2__CondCode1_3, AMFBS_None, { MCK_GPR64, MCK_Imm0_31, MCK_Imm0_15, MCK_CondCode }, },
20417 { 597 /* clrex */, AArch64::CLREX, Convert__Imm0_151_0, AMFBS_None, { MCK_Imm0_15 }, },
21016 { 1101 /* fccmp */, AArch64::FCCMPHrr, Convert__Reg1_0__Reg1_1__Imm0_151_2__CondCode1_3, AMFBS_HasFullFP16, { MCK_FPR16, MCK_FPR16, MCK_Imm0_15, MCK_CondCode }, },
21017 { 1101 /* fccmp */, AArch64::FCCMPSrr, Convert__Reg1_0__Reg1_1__Imm0_151_2__CondCode1_3, AMFBS_HasFPARMv8, { MCK_FPR32, MCK_FPR32, MCK_Imm0_15, MCK_CondCode }, },
21018 { 1101 /* fccmp */, AArch64::FCCMPDrr, Convert__Reg1_0__Reg1_1__Imm0_151_2__CondCode1_3, AMFBS_HasFPARMv8, { MCK_FPR64, MCK_FPR64, MCK_Imm0_15, MCK_CondCode }, },
21019 { 1107 /* fccmpe */, AArch64::FCCMPEHrr, Convert__Reg1_0__Reg1_1__Imm0_151_2__CondCode1_3, AMFBS_HasFullFP16, { MCK_FPR16, MCK_FPR16, MCK_Imm0_15, MCK_CondCode }, },
21020 { 1107 /* fccmpe */, AArch64::FCCMPESrr, Convert__Reg1_0__Reg1_1__Imm0_151_2__CondCode1_3, AMFBS_HasFPARMv8, { MCK_FPR32, MCK_FPR32, MCK_Imm0_15, MCK_CondCode }, },
21021 { 1107 /* fccmpe */, AArch64::FCCMPEDrr, Convert__Reg1_0__Reg1_1__Imm0_151_2__CondCode1_3, AMFBS_HasFPARMv8, { MCK_FPR64, MCK_FPR64, MCK_Imm0_15, MCK_CondCode }, },
23779 { 3300 /* lsl */, AArch64::LSL_ZZI_H, Convert__SVEVectorHReg1_0__SVEVectorHReg1_1__Imm0_151_2, AMFBS_HasSVE, { MCK_SVEVectorHReg, MCK_SVEVectorHReg, MCK_Imm0_15 }, },
23786 { 3300 /* lsl */, AArch64::LSL_ZPmI_H, Convert__SVEVectorHReg1_0__SVEPredicate3bAnyReg1_1__Tie0_1_5__Imm0_151_5, AMFBS_HasSVE, { MCK_SVEVectorHReg, MCK_SVEPredicate3bAnyReg, MCK__47_, MCK_m, MCK_SVEVectorHReg, MCK_Imm0_15 }, },
24027 { 3401 /* msr */, AArch64::MSRpstateImm4, Convert__SystemPStateFieldWithImm0_151_0__Imm0_151_1, AMFBS_None, { MCK_SystemPStateFieldWithImm0_15, MCK_Imm0_15 }, },
24566 { 4285 /* shl */, AArch64::SHLv4i16_shift, Convert__VectorReg641_1__VectorReg641_2__Imm0_151_3, AMFBS_HasNEON, { MCK__DOT_4h, MCK_VectorReg64, MCK_VectorReg64, MCK_Imm0_15 }, },
24569 { 4285 /* shl */, AArch64::SHLv8i16_shift, Convert__VectorReg1281_1__VectorReg1281_2__Imm0_151_3, AMFBS_HasNEON, { MCK__DOT_8h, MCK_VectorReg128, MCK_VectorReg128, MCK_Imm0_15 }, },
24603 { 4336 /* sli */, AArch64::SLI_ZZI_H, Convert__SVEVectorHReg1_0__Tie0_1_1__SVEVectorHReg1_1__Imm0_151_2, AMFBS_HasSVE2, { MCK_SVEVectorHReg, MCK_SVEVectorHReg, MCK_Imm0_15 }, },
24610 { 4336 /* sli */, AArch64::SLIv4i16_shift, Convert__VectorReg641_1__Tie0_2_2__VectorReg641_2__Imm0_151_3, AMFBS_HasNEON, { MCK__DOT_4h, MCK_VectorReg64, MCK_VectorReg64, MCK_Imm0_15 }, },
24613 { 4336 /* sli */, AArch64::SLIv8i16_shift, Convert__VectorReg1281_1__Tie0_2_2__VectorReg1281_2__Imm0_151_3, AMFBS_HasNEON, { MCK__DOT_8h, MCK_VectorReg128, MCK_VectorReg128, MCK_Imm0_15 }, },
25133 { 4924 /* sqshl */, AArch64::SQSHLh, Convert__Reg1_0__Reg1_1__Imm0_151_2, AMFBS_HasNEON, { MCK_FPR16, MCK_FPR16, MCK_Imm0_15 }, },
25146 { 4924 /* sqshl */, AArch64::SQSHLv4i16_shift, Convert__VectorReg641_1__VectorReg641_2__Imm0_151_3, AMFBS_HasNEON, { MCK__DOT_4h, MCK_VectorReg64, MCK_VectorReg64, MCK_Imm0_15 }, },
25152 { 4924 /* sqshl */, AArch64::SQSHLv8i16_shift, Convert__VectorReg1281_1__VectorReg1281_2__Imm0_151_3, AMFBS_HasNEON, { MCK__DOT_8h, MCK_VectorReg128, MCK_VectorReg128, MCK_Imm0_15 }, },
25154 { 4924 /* sqshl */, AArch64::SQSHL_ZPmI_H, Convert__SVEVectorHReg1_0__SVEPredicate3bAnyReg1_1__Tie0_1_5__Imm0_151_5, AMFBS_HasSVE2, { MCK_SVEVectorHReg, MCK_SVEPredicate3bAnyReg, MCK__47_, MCK_m, MCK_SVEVectorHReg, MCK_Imm0_15 }, },
25166 { 4937 /* sqshlu */, AArch64::SQSHLUh, Convert__Reg1_0__Reg1_1__Imm0_151_2, AMFBS_HasNEON, { MCK_FPR16, MCK_FPR16, MCK_Imm0_15 }, },
25173 { 4937 /* sqshlu */, AArch64::SQSHLUv4i16_shift, Convert__VectorReg641_1__VectorReg641_2__Imm0_151_3, AMFBS_HasNEON, { MCK__DOT_4h, MCK_VectorReg64, MCK_VectorReg64, MCK_Imm0_15 }, },
25176 { 4937 /* sqshlu */, AArch64::SQSHLUv8i16_shift, Convert__VectorReg1281_1__VectorReg1281_2__Imm0_151_3, AMFBS_HasNEON, { MCK__DOT_8h, MCK_VectorReg128, MCK_VectorReg128, MCK_Imm0_15 }, },
25177 { 4937 /* sqshlu */, AArch64::SQSHLU_ZPmI_H, Convert__SVEVectorHReg1_0__SVEPredicate3bAnyReg1_1__Tie0_1_5__Imm0_151_5, AMFBS_HasSVE2, { MCK_SVEVectorHReg, MCK_SVEPredicate3bAnyReg, MCK__47_, MCK_m, MCK_SVEVectorHReg, MCK_Imm0_15 }, },
25340 { 5127 /* sshll */, AArch64::SSHLLv4i16_shift, Convert__VectorReg1281_1__VectorReg641_2__Imm0_151_3, AMFBS_HasNEON, { MCK__DOT_4s, MCK_VectorReg128, MCK_VectorReg64, MCK_Imm0_15 }, },
25343 { 5133 /* sshll2 */, AArch64::SSHLLv8i16_shift, Convert__VectorReg1281_1__VectorReg1281_2__Imm0_151_3, AMFBS_HasNEON, { MCK__DOT_4s, MCK_VectorReg128, MCK_VectorReg128, MCK_Imm0_15 }, },
25346 { 5140 /* sshllb */, AArch64::SSHLLB_ZZI_S, Convert__SVEVectorSReg1_0__SVEVectorHReg1_1__Imm0_151_2, AMFBS_HasSVE2, { MCK_SVEVectorSReg, MCK_SVEVectorHReg, MCK_Imm0_15 }, },
25349 { 5147 /* sshllt */, AArch64::SSHLLT_ZZI_S, Convert__SVEVectorSReg1_0__SVEVectorHReg1_1__Imm0_151_2, AMFBS_HasSVE2, { MCK_SVEVectorSReg, MCK_SVEVectorHReg, MCK_Imm0_15 }, },
26334 { 5928 /* subg */, AArch64::SUBG, Convert__Reg1_0__Reg1_1__UImm6s161_2__Imm0_151_3, AMFBS_HasMTE, { MCK_GPR64sp, MCK_GPR64sp, MCK_UImm6s16, MCK_Imm0_15 }, },
26992 { 6643 /* uqshl */, AArch64::UQSHLh, Convert__Reg1_0__Reg1_1__Imm0_151_2, AMFBS_HasNEON, { MCK_FPR16, MCK_FPR16, MCK_Imm0_15 }, },
27005 { 6643 /* uqshl */, AArch64::UQSHLv4i16_shift, Convert__VectorReg641_1__VectorReg641_2__Imm0_151_3, AMFBS_HasNEON, { MCK__DOT_4h, MCK_VectorReg64, MCK_VectorReg64, MCK_Imm0_15 }, },
27011 { 6643 /* uqshl */, AArch64::UQSHLv8i16_shift, Convert__VectorReg1281_1__VectorReg1281_2__Imm0_151_3, AMFBS_HasNEON, { MCK__DOT_8h, MCK_VectorReg128, MCK_VectorReg128, MCK_Imm0_15 }, },
27013 { 6643 /* uqshl */, AArch64::UQSHL_ZPmI_H, Convert__SVEVectorHReg1_0__SVEPredicate3bAnyReg1_1__Tie0_1_5__Imm0_151_5, AMFBS_HasSVE2, { MCK_SVEVectorHReg, MCK_SVEPredicate3bAnyReg, MCK__47_, MCK_m, MCK_SVEVectorHReg, MCK_Imm0_15 }, },
27147 { 6779 /* ushll */, AArch64::USHLLv4i16_shift, Convert__VectorReg1281_1__VectorReg641_2__Imm0_151_3, AMFBS_HasNEON, { MCK__DOT_4s, MCK_VectorReg128, MCK_VectorReg64, MCK_Imm0_15 }, },
27150 { 6785 /* ushll2 */, AArch64::USHLLv8i16_shift, Convert__VectorReg1281_1__VectorReg1281_2__Imm0_151_3, AMFBS_HasNEON, { MCK__DOT_4s, MCK_VectorReg128, MCK_VectorReg128, MCK_Imm0_15 }, },
27153 { 6792 /* ushllb */, AArch64::USHLLB_ZZI_S, Convert__SVEVectorSReg1_0__SVEVectorHReg1_1__Imm0_151_2, AMFBS_HasSVE2, { MCK_SVEVectorSReg, MCK_SVEVectorHReg, MCK_Imm0_15 }, },
27156 { 6799 /* ushllt */, AArch64::USHLLT_ZZI_S, Convert__SVEVectorSReg1_0__SVEVectorHReg1_1__Imm0_151_2, AMFBS_HasSVE2, { MCK_SVEVectorSReg, MCK_SVEVectorHReg, MCK_Imm0_15 }, },