reference, declaration → definition definition → references, declarations, derived classes, virtual overrides reference to multiple definitions → definitions unreferenced |
9013 case MCK_Imm0_127: { 11989 case MCK_Imm0_127: return "MCK_Imm0_127"; 13261 { 687 /* cmphi */, AArch64::CMPHI_PPzZI_H, Convert__SVEPredicateHReg1_0__SVEPredicate3bAnyReg1_1__SVEVectorHReg1_4__Imm0_1271_5, AMFBS_HasSVE, { MCK_SVEPredicateHReg, MCK_SVEPredicate3bAnyReg, MCK__47_, MCK_z, MCK_SVEVectorHReg, MCK_Imm0_127 }, }, 13264 { 687 /* cmphi */, AArch64::CMPHI_PPzZI_S, Convert__SVEPredicateSReg1_0__SVEPredicate3bAnyReg1_1__SVEVectorSReg1_4__Imm0_1271_5, AMFBS_HasSVE, { MCK_SVEPredicateSReg, MCK_SVEPredicate3bAnyReg, MCK__47_, MCK_z, MCK_SVEVectorSReg, MCK_Imm0_127 }, }, 13267 { 687 /* cmphi */, AArch64::CMPHI_PPzZI_D, Convert__SVEPredicateDReg1_0__SVEPredicate3bAnyReg1_1__SVEVectorDReg1_4__Imm0_1271_5, AMFBS_HasSVE, { MCK_SVEPredicateDReg, MCK_SVEPredicate3bAnyReg, MCK__47_, MCK_z, MCK_SVEVectorDReg, MCK_Imm0_127 }, }, 13269 { 687 /* cmphi */, AArch64::CMPHI_PPzZI_B, Convert__SVEPredicateBReg1_0__SVEPredicate3bAnyReg1_1__SVEVectorBReg1_4__Imm0_1271_5, AMFBS_HasSVE, { MCK_SVEPredicateBReg, MCK_SVEPredicate3bAnyReg, MCK__47_, MCK_z, MCK_SVEVectorBReg, MCK_Imm0_127 }, }, 13272 { 693 /* cmphs */, AArch64::CMPHS_PPzZI_H, Convert__SVEPredicateHReg1_0__SVEPredicate3bAnyReg1_1__SVEVectorHReg1_4__Imm0_1271_5, AMFBS_HasSVE, { MCK_SVEPredicateHReg, MCK_SVEPredicate3bAnyReg, MCK__47_, MCK_z, MCK_SVEVectorHReg, MCK_Imm0_127 }, }, 13275 { 693 /* cmphs */, AArch64::CMPHS_PPzZI_S, Convert__SVEPredicateSReg1_0__SVEPredicate3bAnyReg1_1__SVEVectorSReg1_4__Imm0_1271_5, AMFBS_HasSVE, { MCK_SVEPredicateSReg, MCK_SVEPredicate3bAnyReg, MCK__47_, MCK_z, MCK_SVEVectorSReg, MCK_Imm0_127 }, }, 13278 { 693 /* cmphs */, AArch64::CMPHS_PPzZI_D, Convert__SVEPredicateDReg1_0__SVEPredicate3bAnyReg1_1__SVEVectorDReg1_4__Imm0_1271_5, AMFBS_HasSVE, { MCK_SVEPredicateDReg, MCK_SVEPredicate3bAnyReg, MCK__47_, MCK_z, MCK_SVEVectorDReg, MCK_Imm0_127 }, }, 13280 { 693 /* cmphs */, AArch64::CMPHS_PPzZI_B, Convert__SVEPredicateBReg1_0__SVEPredicate3bAnyReg1_1__SVEVectorBReg1_4__Imm0_1271_5, AMFBS_HasSVE, { MCK_SVEPredicateBReg, MCK_SVEPredicate3bAnyReg, MCK__47_, MCK_z, MCK_SVEVectorBReg, MCK_Imm0_127 }, }, 13294 { 705 /* cmplo */, AArch64::CMPLO_PPzZI_H, Convert__SVEPredicateHReg1_0__SVEPredicate3bAnyReg1_1__SVEVectorHReg1_4__Imm0_1271_5, AMFBS_HasSVE, { MCK_SVEPredicateHReg, MCK_SVEPredicate3bAnyReg, MCK__47_, MCK_z, MCK_SVEVectorHReg, MCK_Imm0_127 }, }, 13297 { 705 /* cmplo */, AArch64::CMPLO_PPzZI_S, Convert__SVEPredicateSReg1_0__SVEPredicate3bAnyReg1_1__SVEVectorSReg1_4__Imm0_1271_5, AMFBS_HasSVE, { MCK_SVEPredicateSReg, MCK_SVEPredicate3bAnyReg, MCK__47_, MCK_z, MCK_SVEVectorSReg, MCK_Imm0_127 }, }, 13300 { 705 /* cmplo */, AArch64::CMPLO_PPzZI_D, Convert__SVEPredicateDReg1_0__SVEPredicate3bAnyReg1_1__SVEVectorDReg1_4__Imm0_1271_5, AMFBS_HasSVE, { MCK_SVEPredicateDReg, MCK_SVEPredicate3bAnyReg, MCK__47_, MCK_z, MCK_SVEVectorDReg, MCK_Imm0_127 }, }, 13302 { 705 /* cmplo */, AArch64::CMPLO_PPzZI_B, Convert__SVEPredicateBReg1_0__SVEPredicate3bAnyReg1_1__SVEVectorBReg1_4__Imm0_1271_5, AMFBS_HasSVE, { MCK_SVEPredicateBReg, MCK_SVEPredicate3bAnyReg, MCK__47_, MCK_z, MCK_SVEVectorBReg, MCK_Imm0_127 }, }, 13305 { 711 /* cmpls */, AArch64::CMPLS_PPzZI_H, Convert__SVEPredicateHReg1_0__SVEPredicate3bAnyReg1_1__SVEVectorHReg1_4__Imm0_1271_5, AMFBS_HasSVE, { MCK_SVEPredicateHReg, MCK_SVEPredicate3bAnyReg, MCK__47_, MCK_z, MCK_SVEVectorHReg, MCK_Imm0_127 }, }, 13308 { 711 /* cmpls */, AArch64::CMPLS_PPzZI_S, Convert__SVEPredicateSReg1_0__SVEPredicate3bAnyReg1_1__SVEVectorSReg1_4__Imm0_1271_5, AMFBS_HasSVE, { MCK_SVEPredicateSReg, MCK_SVEPredicate3bAnyReg, MCK__47_, MCK_z, MCK_SVEVectorSReg, MCK_Imm0_127 }, }, 13311 { 711 /* cmpls */, AArch64::CMPLS_PPzZI_D, Convert__SVEPredicateDReg1_0__SVEPredicate3bAnyReg1_1__SVEVectorDReg1_4__Imm0_1271_5, AMFBS_HasSVE, { MCK_SVEPredicateDReg, MCK_SVEPredicate3bAnyReg, MCK__47_, MCK_z, MCK_SVEVectorDReg, MCK_Imm0_127 }, }, 13313 { 711 /* cmpls */, AArch64::CMPLS_PPzZI_B, Convert__SVEPredicateBReg1_0__SVEPredicate3bAnyReg1_1__SVEVectorBReg1_4__Imm0_1271_5, AMFBS_HasSVE, { MCK_SVEPredicateBReg, MCK_SVEPredicate3bAnyReg, MCK__47_, MCK_z, MCK_SVEVectorBReg, MCK_Imm0_127 }, }, 14619 { 1765 /* hint */, AArch64::HINT, Convert__Imm0_1271_0, AMFBS_None, { MCK_Imm0_127 }, }, 20619 { 687 /* cmphi */, AArch64::CMPHI_PPzZI_H, Convert__SVEPredicateHReg1_0__SVEPredicate3bAnyReg1_1__SVEVectorHReg1_4__Imm0_1271_5, AMFBS_HasSVE, { MCK_SVEPredicateHReg, MCK_SVEPredicate3bAnyReg, MCK__47_, MCK_z, MCK_SVEVectorHReg, MCK_Imm0_127 }, }, 20622 { 687 /* cmphi */, AArch64::CMPHI_PPzZI_S, Convert__SVEPredicateSReg1_0__SVEPredicate3bAnyReg1_1__SVEVectorSReg1_4__Imm0_1271_5, AMFBS_HasSVE, { MCK_SVEPredicateSReg, MCK_SVEPredicate3bAnyReg, MCK__47_, MCK_z, MCK_SVEVectorSReg, MCK_Imm0_127 }, }, 20625 { 687 /* cmphi */, AArch64::CMPHI_PPzZI_D, Convert__SVEPredicateDReg1_0__SVEPredicate3bAnyReg1_1__SVEVectorDReg1_4__Imm0_1271_5, AMFBS_HasSVE, { MCK_SVEPredicateDReg, MCK_SVEPredicate3bAnyReg, MCK__47_, MCK_z, MCK_SVEVectorDReg, MCK_Imm0_127 }, }, 20627 { 687 /* cmphi */, AArch64::CMPHI_PPzZI_B, Convert__SVEPredicateBReg1_0__SVEPredicate3bAnyReg1_1__SVEVectorBReg1_4__Imm0_1271_5, AMFBS_HasSVE, { MCK_SVEPredicateBReg, MCK_SVEPredicate3bAnyReg, MCK__47_, MCK_z, MCK_SVEVectorBReg, MCK_Imm0_127 }, }, 20630 { 693 /* cmphs */, AArch64::CMPHS_PPzZI_H, Convert__SVEPredicateHReg1_0__SVEPredicate3bAnyReg1_1__SVEVectorHReg1_4__Imm0_1271_5, AMFBS_HasSVE, { MCK_SVEPredicateHReg, MCK_SVEPredicate3bAnyReg, MCK__47_, MCK_z, MCK_SVEVectorHReg, MCK_Imm0_127 }, }, 20633 { 693 /* cmphs */, AArch64::CMPHS_PPzZI_S, Convert__SVEPredicateSReg1_0__SVEPredicate3bAnyReg1_1__SVEVectorSReg1_4__Imm0_1271_5, AMFBS_HasSVE, { MCK_SVEPredicateSReg, MCK_SVEPredicate3bAnyReg, MCK__47_, MCK_z, MCK_SVEVectorSReg, MCK_Imm0_127 }, }, 20636 { 693 /* cmphs */, AArch64::CMPHS_PPzZI_D, Convert__SVEPredicateDReg1_0__SVEPredicate3bAnyReg1_1__SVEVectorDReg1_4__Imm0_1271_5, AMFBS_HasSVE, { MCK_SVEPredicateDReg, MCK_SVEPredicate3bAnyReg, MCK__47_, MCK_z, MCK_SVEVectorDReg, MCK_Imm0_127 }, }, 20638 { 693 /* cmphs */, AArch64::CMPHS_PPzZI_B, Convert__SVEPredicateBReg1_0__SVEPredicate3bAnyReg1_1__SVEVectorBReg1_4__Imm0_1271_5, AMFBS_HasSVE, { MCK_SVEPredicateBReg, MCK_SVEPredicate3bAnyReg, MCK__47_, MCK_z, MCK_SVEVectorBReg, MCK_Imm0_127 }, }, 20652 { 705 /* cmplo */, AArch64::CMPLO_PPzZI_H, Convert__SVEPredicateHReg1_0__SVEPredicate3bAnyReg1_1__SVEVectorHReg1_4__Imm0_1271_5, AMFBS_HasSVE, { MCK_SVEPredicateHReg, MCK_SVEPredicate3bAnyReg, MCK__47_, MCK_z, MCK_SVEVectorHReg, MCK_Imm0_127 }, }, 20655 { 705 /* cmplo */, AArch64::CMPLO_PPzZI_S, Convert__SVEPredicateSReg1_0__SVEPredicate3bAnyReg1_1__SVEVectorSReg1_4__Imm0_1271_5, AMFBS_HasSVE, { MCK_SVEPredicateSReg, MCK_SVEPredicate3bAnyReg, MCK__47_, MCK_z, MCK_SVEVectorSReg, MCK_Imm0_127 }, }, 20658 { 705 /* cmplo */, AArch64::CMPLO_PPzZI_D, Convert__SVEPredicateDReg1_0__SVEPredicate3bAnyReg1_1__SVEVectorDReg1_4__Imm0_1271_5, AMFBS_HasSVE, { MCK_SVEPredicateDReg, MCK_SVEPredicate3bAnyReg, MCK__47_, MCK_z, MCK_SVEVectorDReg, MCK_Imm0_127 }, }, 20660 { 705 /* cmplo */, AArch64::CMPLO_PPzZI_B, Convert__SVEPredicateBReg1_0__SVEPredicate3bAnyReg1_1__SVEVectorBReg1_4__Imm0_1271_5, AMFBS_HasSVE, { MCK_SVEPredicateBReg, MCK_SVEPredicate3bAnyReg, MCK__47_, MCK_z, MCK_SVEVectorBReg, MCK_Imm0_127 }, }, 20663 { 711 /* cmpls */, AArch64::CMPLS_PPzZI_H, Convert__SVEPredicateHReg1_0__SVEPredicate3bAnyReg1_1__SVEVectorHReg1_4__Imm0_1271_5, AMFBS_HasSVE, { MCK_SVEPredicateHReg, MCK_SVEPredicate3bAnyReg, MCK__47_, MCK_z, MCK_SVEVectorHReg, MCK_Imm0_127 }, }, 20666 { 711 /* cmpls */, AArch64::CMPLS_PPzZI_S, Convert__SVEPredicateSReg1_0__SVEPredicate3bAnyReg1_1__SVEVectorSReg1_4__Imm0_1271_5, AMFBS_HasSVE, { MCK_SVEPredicateSReg, MCK_SVEPredicate3bAnyReg, MCK__47_, MCK_z, MCK_SVEVectorSReg, MCK_Imm0_127 }, }, 20669 { 711 /* cmpls */, AArch64::CMPLS_PPzZI_D, Convert__SVEPredicateDReg1_0__SVEPredicate3bAnyReg1_1__SVEVectorDReg1_4__Imm0_1271_5, AMFBS_HasSVE, { MCK_SVEPredicateDReg, MCK_SVEPredicate3bAnyReg, MCK__47_, MCK_z, MCK_SVEVectorDReg, MCK_Imm0_127 }, }, 20671 { 711 /* cmpls */, AArch64::CMPLS_PPzZI_B, Convert__SVEPredicateBReg1_0__SVEPredicate3bAnyReg1_1__SVEVectorBReg1_4__Imm0_1271_5, AMFBS_HasSVE, { MCK_SVEPredicateBReg, MCK_SVEPredicate3bAnyReg, MCK__47_, MCK_z, MCK_SVEVectorBReg, MCK_Imm0_127 }, }, 21977 { 1765 /* hint */, AArch64::HINT, Convert__Imm0_1271_0, AMFBS_None, { MCK_Imm0_127 }, },