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reference, declaration → definition
definition → references, declarations, derived classes, virtual overrides
reference to multiple definitions → definitions
unreferenced
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References
gen/lib/Target/AArch64/AArch64GenAsmMatcher.inc 8067 case MCK_GPR64sponly:
11255 case AArch64::SP: OpKind = MCK_GPR64sponly; break;
11860 case MCK_GPR64sponly: return "MCK_GPR64sponly";
12705 { 25 /* add */, AArch64::ADDXrx64, Convert__Reg1_0__Reg1_1__Reg1_2__imm_95_24, AMFBS_None, { MCK_GPR64sponly, MCK_GPR64sp, MCK_GPR64 }, },
12712 { 25 /* add */, AArch64::ADDXrx64, Convert__Reg1_0__Reg1_1__Reg1_2__imm_95_24, AMFBS_None, { MCK_GPR64sp, MCK_GPR64sponly, MCK_GPR64 }, },
12769 { 72 /* adds */, AArch64::ADDSXrx64, Convert__Reg1_0__Reg1_1__Reg1_2__imm_95_24, AMFBS_None, { MCK_GPR64, MCK_GPR64sponly, MCK_GPR64 }, },
13203 { 661 /* cmn */, AArch64::ADDSXrx64, Convert__regXZR__Reg1_0__Reg1_1__imm_95_24, AMFBS_None, { MCK_GPR64sponly, MCK_GPR64 }, },
13216 { 665 /* cmp */, AArch64::SUBSXrx64, Convert__regXZR__Reg1_0__Reg1_1__imm_95_24, AMFBS_None, { MCK_GPR64sponly, MCK_GPR64 }, },
16518 { 3356 /* mov */, AArch64::ADDXri, Convert__Reg1_0__Reg1_1__imm_95_0__imm_95_0, AMFBS_None, { MCK_GPR64sponly, MCK_GPR64sp }, },
16535 { 3356 /* mov */, AArch64::ADDXri, Convert__Reg1_0__Reg1_1__imm_95_0__imm_95_0, AMFBS_None, { MCK_GPR64sp, MCK_GPR64sponly }, },
18942 { 5924 /* sub */, AArch64::SUBXrx64, Convert__Reg1_0__Reg1_1__Reg1_2__imm_95_24, AMFBS_None, { MCK_GPR64sponly, MCK_GPR64sp, MCK_GPR64 }, },
18949 { 5924 /* sub */, AArch64::SUBXrx64, Convert__Reg1_0__Reg1_1__Reg1_2__imm_95_24, AMFBS_None, { MCK_GPR64sp, MCK_GPR64sponly, MCK_GPR64 }, },
19003 { 5976 /* subs */, AArch64::SUBSXrx64, Convert__Reg1_0__Reg1_1__Reg1_2__imm_95_24, AMFBS_None, { MCK_GPR64, MCK_GPR64sponly, MCK_GPR64 }, },
20063 { 25 /* add */, AArch64::ADDXrx64, Convert__Reg1_0__Reg1_1__Reg1_2__imm_95_24, AMFBS_None, { MCK_GPR64sponly, MCK_GPR64sp, MCK_GPR64 }, },
20070 { 25 /* add */, AArch64::ADDXrx64, Convert__Reg1_0__Reg1_1__Reg1_2__imm_95_24, AMFBS_None, { MCK_GPR64sp, MCK_GPR64sponly, MCK_GPR64 }, },
20127 { 72 /* adds */, AArch64::ADDSXrx64, Convert__Reg1_0__Reg1_1__Reg1_2__imm_95_24, AMFBS_None, { MCK_GPR64, MCK_GPR64sponly, MCK_GPR64 }, },
20561 { 661 /* cmn */, AArch64::ADDSXrx64, Convert__regXZR__Reg1_0__Reg1_1__imm_95_24, AMFBS_None, { MCK_GPR64sponly, MCK_GPR64 }, },
20574 { 665 /* cmp */, AArch64::SUBSXrx64, Convert__regXZR__Reg1_0__Reg1_1__imm_95_24, AMFBS_None, { MCK_GPR64sponly, MCK_GPR64 }, },
23876 { 3356 /* mov */, AArch64::ADDXri, Convert__Reg1_0__Reg1_1__imm_95_0__imm_95_0, AMFBS_None, { MCK_GPR64sponly, MCK_GPR64sp }, },
23893 { 3356 /* mov */, AArch64::ADDXri, Convert__Reg1_0__Reg1_1__imm_95_0__imm_95_0, AMFBS_None, { MCK_GPR64sp, MCK_GPR64sponly }, },
26300 { 5924 /* sub */, AArch64::SUBXrx64, Convert__Reg1_0__Reg1_1__Reg1_2__imm_95_24, AMFBS_None, { MCK_GPR64sponly, MCK_GPR64sp, MCK_GPR64 }, },
26307 { 5924 /* sub */, AArch64::SUBXrx64, Convert__Reg1_0__Reg1_1__Reg1_2__imm_95_24, AMFBS_None, { MCK_GPR64sp, MCK_GPR64sponly, MCK_GPR64 }, },
26361 { 5976 /* subs */, AArch64::SUBSXrx64, Convert__Reg1_0__Reg1_1__Reg1_2__imm_95_24, AMFBS_None, { MCK_GPR64, MCK_GPR64sponly, MCK_GPR64 }, },