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reference, declaration → definition
definition → references, declarations, derived classes, virtual overrides
reference to multiple definitions → definitions
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References
gen/lib/Target/AArch64/AArch64GenAsmMatcher.inc 8970 case MCK_GPR64shifted16: {
11984 case MCK_GPR64shifted16: return "MCK_GPR64shifted16";
15830 { 2464 /* ldff1h */, AArch64::LDFF1H_REAL, Convert__SVEVectorHReg1_0__SVEPredicate3bAnyReg1_1__Reg1_5__GPR64shifted161_6, AMFBS_HasSVE, { MCK_SVEVectorHReg, MCK_SVEPredicate3bAnyReg, MCK__47_, MCK_z, MCK__91_, MCK_GPR64sp, MCK_GPR64shifted16, MCK__93_ }, },
15831 { 2464 /* ldff1h */, AArch64::LDFF1H_S_REAL, Convert__SVEVectorSReg1_0__SVEPredicate3bAnyReg1_1__Reg1_5__GPR64shifted161_6, AMFBS_HasSVE, { MCK_SVEVectorSReg, MCK_SVEPredicate3bAnyReg, MCK__47_, MCK_z, MCK__91_, MCK_GPR64sp, MCK_GPR64shifted16, MCK__93_ }, },
15837 { 2464 /* ldff1h */, AArch64::LDFF1H_D_REAL, Convert__SVEVectorDReg1_0__SVEPredicate3bAnyReg1_1__Reg1_5__GPR64shifted161_6, AMFBS_HasSVE, { MCK_SVEVectorDReg, MCK_SVEPredicate3bAnyReg, MCK__47_, MCK_z, MCK__91_, MCK_GPR64sp, MCK_GPR64shifted16, MCK__93_ }, },
15845 { 2464 /* ldff1h */, AArch64::LDFF1H_REAL, Convert__SVEVectorList1161_0__SVEPredicate3bAnyReg1_1__Reg1_5__GPR64shifted161_6, AMFBS_HasSVE, { MCK_SVEVectorList116, MCK_SVEPredicate3bAnyReg, MCK__47_, MCK_z, MCK__91_, MCK_GPR64sp, MCK_GPR64shifted16, MCK__93_ }, },
15846 { 2464 /* ldff1h */, AArch64::LDFF1H_S_REAL, Convert__SVEVectorList1321_0__SVEPredicate3bAnyReg1_1__Reg1_5__GPR64shifted161_6, AMFBS_HasSVE, { MCK_SVEVectorList132, MCK_SVEPredicate3bAnyReg, MCK__47_, MCK_z, MCK__91_, MCK_GPR64sp, MCK_GPR64shifted16, MCK__93_ }, },
15852 { 2464 /* ldff1h */, AArch64::LDFF1H_D_REAL, Convert__SVEVectorList1641_0__SVEPredicate3bAnyReg1_1__Reg1_5__GPR64shifted161_6, AMFBS_HasSVE, { MCK_SVEVectorList164, MCK_SVEPredicate3bAnyReg, MCK__47_, MCK_z, MCK__91_, MCK_GPR64sp, MCK_GPR64shifted16, MCK__93_ }, },
15898 { 2479 /* ldff1sh */, AArch64::LDFF1SH_S_REAL, Convert__SVEVectorSReg1_0__SVEPredicate3bAnyReg1_1__Reg1_5__GPR64shifted161_6, AMFBS_HasSVE, { MCK_SVEVectorSReg, MCK_SVEPredicate3bAnyReg, MCK__47_, MCK_z, MCK__91_, MCK_GPR64sp, MCK_GPR64shifted16, MCK__93_ }, },
15904 { 2479 /* ldff1sh */, AArch64::LDFF1SH_D_REAL, Convert__SVEVectorDReg1_0__SVEPredicate3bAnyReg1_1__Reg1_5__GPR64shifted161_6, AMFBS_HasSVE, { MCK_SVEVectorDReg, MCK_SVEPredicate3bAnyReg, MCK__47_, MCK_z, MCK__91_, MCK_GPR64sp, MCK_GPR64shifted16, MCK__93_ }, },
15912 { 2479 /* ldff1sh */, AArch64::LDFF1SH_S_REAL, Convert__SVEVectorList1321_0__SVEPredicate3bAnyReg1_1__Reg1_5__GPR64shifted161_6, AMFBS_HasSVE, { MCK_SVEVectorList132, MCK_SVEPredicate3bAnyReg, MCK__47_, MCK_z, MCK__91_, MCK_GPR64sp, MCK_GPR64shifted16, MCK__93_ }, },
15918 { 2479 /* ldff1sh */, AArch64::LDFF1SH_D_REAL, Convert__SVEVectorList1641_0__SVEPredicate3bAnyReg1_1__Reg1_5__GPR64shifted161_6, AMFBS_HasSVE, { MCK_SVEVectorList164, MCK_SVEPredicate3bAnyReg, MCK__47_, MCK_z, MCK__91_, MCK_GPR64sp, MCK_GPR64shifted16, MCK__93_ }, },
23188 { 2464 /* ldff1h */, AArch64::LDFF1H_REAL, Convert__SVEVectorHReg1_0__SVEPredicate3bAnyReg1_1__Reg1_5__GPR64shifted161_6, AMFBS_HasSVE, { MCK_SVEVectorHReg, MCK_SVEPredicate3bAnyReg, MCK__47_, MCK_z, MCK__91_, MCK_GPR64sp, MCK_GPR64shifted16, MCK__93_ }, },
23189 { 2464 /* ldff1h */, AArch64::LDFF1H_S_REAL, Convert__SVEVectorSReg1_0__SVEPredicate3bAnyReg1_1__Reg1_5__GPR64shifted161_6, AMFBS_HasSVE, { MCK_SVEVectorSReg, MCK_SVEPredicate3bAnyReg, MCK__47_, MCK_z, MCK__91_, MCK_GPR64sp, MCK_GPR64shifted16, MCK__93_ }, },
23195 { 2464 /* ldff1h */, AArch64::LDFF1H_D_REAL, Convert__SVEVectorDReg1_0__SVEPredicate3bAnyReg1_1__Reg1_5__GPR64shifted161_6, AMFBS_HasSVE, { MCK_SVEVectorDReg, MCK_SVEPredicate3bAnyReg, MCK__47_, MCK_z, MCK__91_, MCK_GPR64sp, MCK_GPR64shifted16, MCK__93_ }, },
23203 { 2464 /* ldff1h */, AArch64::LDFF1H_REAL, Convert__SVEVectorList1161_0__SVEPredicate3bAnyReg1_1__Reg1_5__GPR64shifted161_6, AMFBS_HasSVE, { MCK_SVEVectorList116, MCK_SVEPredicate3bAnyReg, MCK__47_, MCK_z, MCK__91_, MCK_GPR64sp, MCK_GPR64shifted16, MCK__93_ }, },
23204 { 2464 /* ldff1h */, AArch64::LDFF1H_S_REAL, Convert__SVEVectorList1321_0__SVEPredicate3bAnyReg1_1__Reg1_5__GPR64shifted161_6, AMFBS_HasSVE, { MCK_SVEVectorList132, MCK_SVEPredicate3bAnyReg, MCK__47_, MCK_z, MCK__91_, MCK_GPR64sp, MCK_GPR64shifted16, MCK__93_ }, },
23210 { 2464 /* ldff1h */, AArch64::LDFF1H_D_REAL, Convert__SVEVectorList1641_0__SVEPredicate3bAnyReg1_1__Reg1_5__GPR64shifted161_6, AMFBS_HasSVE, { MCK_SVEVectorList164, MCK_SVEPredicate3bAnyReg, MCK__47_, MCK_z, MCK__91_, MCK_GPR64sp, MCK_GPR64shifted16, MCK__93_ }, },
23256 { 2479 /* ldff1sh */, AArch64::LDFF1SH_S_REAL, Convert__SVEVectorSReg1_0__SVEPredicate3bAnyReg1_1__Reg1_5__GPR64shifted161_6, AMFBS_HasSVE, { MCK_SVEVectorSReg, MCK_SVEPredicate3bAnyReg, MCK__47_, MCK_z, MCK__91_, MCK_GPR64sp, MCK_GPR64shifted16, MCK__93_ }, },
23262 { 2479 /* ldff1sh */, AArch64::LDFF1SH_D_REAL, Convert__SVEVectorDReg1_0__SVEPredicate3bAnyReg1_1__Reg1_5__GPR64shifted161_6, AMFBS_HasSVE, { MCK_SVEVectorDReg, MCK_SVEPredicate3bAnyReg, MCK__47_, MCK_z, MCK__91_, MCK_GPR64sp, MCK_GPR64shifted16, MCK__93_ }, },
23270 { 2479 /* ldff1sh */, AArch64::LDFF1SH_S_REAL, Convert__SVEVectorList1321_0__SVEPredicate3bAnyReg1_1__Reg1_5__GPR64shifted161_6, AMFBS_HasSVE, { MCK_SVEVectorList132, MCK_SVEPredicate3bAnyReg, MCK__47_, MCK_z, MCK__91_, MCK_GPR64sp, MCK_GPR64shifted16, MCK__93_ }, },
23276 { 2479 /* ldff1sh */, AArch64::LDFF1SH_D_REAL, Convert__SVEVectorList1641_0__SVEPredicate3bAnyReg1_1__Reg1_5__GPR64shifted161_6, AMFBS_HasSVE, { MCK_SVEVectorList164, MCK_SVEPredicate3bAnyReg, MCK__47_, MCK_z, MCK__91_, MCK_GPR64sp, MCK_GPR64shifted16, MCK__93_ }, },
33208 { 2464 /* ldff1h */, 64 /* 6 */, MCK_GPR64shifted16, AMFBS_HasSVE },
33211 { 2464 /* ldff1h */, 64 /* 6 */, MCK_GPR64shifted16, AMFBS_HasSVE },
33214 { 2464 /* ldff1h */, 64 /* 6 */, MCK_GPR64shifted16, AMFBS_HasSVE },
33217 { 2464 /* ldff1h */, 64 /* 6 */, MCK_GPR64shifted16, AMFBS_HasSVE },
33248 { 2464 /* ldff1h */, 64 /* 6 */, MCK_GPR64shifted16, AMFBS_HasSVE },
33251 { 2464 /* ldff1h */, 64 /* 6 */, MCK_GPR64shifted16, AMFBS_HasSVE },
33294 { 2464 /* ldff1h */, 64 /* 6 */, MCK_GPR64shifted16, AMFBS_HasSVE },
33297 { 2464 /* ldff1h */, 64 /* 6 */, MCK_GPR64shifted16, AMFBS_HasSVE },
33300 { 2464 /* ldff1h */, 64 /* 6 */, MCK_GPR64shifted16, AMFBS_HasSVE },
33303 { 2464 /* ldff1h */, 64 /* 6 */, MCK_GPR64shifted16, AMFBS_HasSVE },
33336 { 2464 /* ldff1h */, 64 /* 6 */, MCK_GPR64shifted16, AMFBS_HasSVE },
33339 { 2464 /* ldff1h */, 64 /* 6 */, MCK_GPR64shifted16, AMFBS_HasSVE },
33580 { 2479 /* ldff1sh */, 64 /* 6 */, MCK_GPR64shifted16, AMFBS_HasSVE },
33583 { 2479 /* ldff1sh */, 64 /* 6 */, MCK_GPR64shifted16, AMFBS_HasSVE },
33614 { 2479 /* ldff1sh */, 64 /* 6 */, MCK_GPR64shifted16, AMFBS_HasSVE },
33617 { 2479 /* ldff1sh */, 64 /* 6 */, MCK_GPR64shifted16, AMFBS_HasSVE },
33660 { 2479 /* ldff1sh */, 64 /* 6 */, MCK_GPR64shifted16, AMFBS_HasSVE },
33663 { 2479 /* ldff1sh */, 64 /* 6 */, MCK_GPR64shifted16, AMFBS_HasSVE },
33696 { 2479 /* ldff1sh */, 64 /* 6 */, MCK_GPR64shifted16, AMFBS_HasSVE },
33699 { 2479 /* ldff1sh */, 64 /* 6 */, MCK_GPR64shifted16, AMFBS_HasSVE },
40661 case MCK_GPR64shifted16: