reference, declarationdefinition
definition → references, declarations, derived classes, virtual overrides
reference to multiple definitions → definitions
unreferenced

References

gen/lib/Target/AArch64/AArch64GenAsmMatcher.inc
10782   case MCK_FPRAsmOperandFPR8: {
12204   case MCK_FPRAsmOperandFPR8: return "MCK_FPRAsmOperandFPR8";
16168   { 2650 /* ldr */, AArch64::LDRBui, Convert__FPRAsmOperandFPR81_0__Reg1_2__imm_95_0, AMFBS_None, { MCK_FPRAsmOperandFPR8, MCK__91_, MCK_GPR64sp, MCK__93_ }, },
16181   { 2650 /* ldr */, AArch64::LDRBpost, Convert__Reg1_2__FPRAsmOperandFPR81_0__Tie0_3_3__SImm91_4, AMFBS_None, { MCK_FPRAsmOperandFPR8, MCK__91_, MCK_GPR64sp, MCK__93_, MCK_SImm9 }, },
16182   { 2650 /* ldr */, AArch64::LDRBroX, Convert__FPRAsmOperandFPR81_0__Reg1_2__Reg1_3__imm_95_0__imm_95_0, AMFBS_None, { MCK_FPRAsmOperandFPR8, MCK__91_, MCK_GPR64sp, MCK_GPR64, MCK__93_ }, },
16183   { 2650 /* ldr */, AArch64::LDURBi, Convert__FPRAsmOperandFPR81_0__Reg1_2__SImm9OffsetFB81_3, AMFBS_None, { MCK_FPRAsmOperandFPR8, MCK__91_, MCK_GPR64sp, MCK_SImm9OffsetFB8, MCK__93_ }, },
16184   { 2650 /* ldr */, AArch64::LDRBui, Convert__FPRAsmOperandFPR81_0__Reg1_2__UImm12Offset11_3, AMFBS_None, { MCK_FPRAsmOperandFPR8, MCK__91_, MCK_GPR64sp, MCK_UImm12Offset1, MCK__93_ }, },
16207   { 2650 /* ldr */, AArch64::LDRBroW, Convert__FPRAsmOperandFPR81_0__Reg1_2__Reg1_3__MemWExtend82_4, AMFBS_None, { MCK_FPRAsmOperandFPR8, MCK__91_, MCK_GPR64sp, MCK_GPR32, MCK_MemWExtend8, MCK__93_ }, },
16208   { 2650 /* ldr */, AArch64::LDRBroX, Convert__FPRAsmOperandFPR81_0__Reg1_2__Reg1_3__MemXExtend82_4, AMFBS_None, { MCK_FPRAsmOperandFPR8, MCK__91_, MCK_GPR64sp, MCK_GPR64, MCK_MemXExtend8, MCK__93_ }, },
16209   { 2650 /* ldr */, AArch64::LDRBpre, Convert__Reg1_2__FPRAsmOperandFPR81_0__Tie0_3_3__SImm91_3, AMFBS_None, { MCK_FPRAsmOperandFPR8, MCK__91_, MCK_GPR64sp, MCK_SImm9, MCK__93_, MCK__EXCLAIM_ }, },
16387   { 3240 /* ldur */, AArch64::LDURBi, Convert__FPRAsmOperandFPR81_0__Reg1_2__imm_95_0, AMFBS_None, { MCK_FPRAsmOperandFPR8, MCK__91_, MCK_GPR64sp, MCK__93_ }, },
16394   { 3240 /* ldur */, AArch64::LDURBi, Convert__FPRAsmOperandFPR81_0__Reg1_2__SImm91_3, AMFBS_None, { MCK_FPRAsmOperandFPR8, MCK__91_, MCK_GPR64sp, MCK_SImm9, MCK__93_ }, },
18788   { 5598 /* str */, AArch64::STRBui, Convert__FPRAsmOperandFPR81_0__Reg1_2__imm_95_0, AMFBS_None, { MCK_FPRAsmOperandFPR8, MCK__91_, MCK_GPR64sp, MCK__93_ }, },
18801   { 5598 /* str */, AArch64::STRBpost, Convert__Reg1_2__FPRAsmOperandFPR81_0__Tie0_3_3__SImm91_4, AMFBS_None, { MCK_FPRAsmOperandFPR8, MCK__91_, MCK_GPR64sp, MCK__93_, MCK_SImm9 }, },
18802   { 5598 /* str */, AArch64::STRBroX, Convert__FPRAsmOperandFPR81_0__Reg1_2__Reg1_3__imm_95_0__imm_95_0, AMFBS_None, { MCK_FPRAsmOperandFPR8, MCK__91_, MCK_GPR64sp, MCK_GPR64, MCK__93_ }, },
18803   { 5598 /* str */, AArch64::STURBi, Convert__FPRAsmOperandFPR81_0__Reg1_2__SImm9OffsetFB81_3, AMFBS_None, { MCK_FPRAsmOperandFPR8, MCK__91_, MCK_GPR64sp, MCK_SImm9OffsetFB8, MCK__93_ }, },
18804   { 5598 /* str */, AArch64::STRBui, Convert__FPRAsmOperandFPR81_0__Reg1_2__UImm12Offset11_3, AMFBS_None, { MCK_FPRAsmOperandFPR8, MCK__91_, MCK_GPR64sp, MCK_UImm12Offset1, MCK__93_ }, },
18827   { 5598 /* str */, AArch64::STRBroW, Convert__FPRAsmOperandFPR81_0__Reg1_2__Reg1_3__MemWExtend82_4, AMFBS_None, { MCK_FPRAsmOperandFPR8, MCK__91_, MCK_GPR64sp, MCK_GPR32, MCK_MemWExtend8, MCK__93_ }, },
18828   { 5598 /* str */, AArch64::STRBroX, Convert__FPRAsmOperandFPR81_0__Reg1_2__Reg1_3__MemXExtend82_4, AMFBS_None, { MCK_FPRAsmOperandFPR8, MCK__91_, MCK_GPR64sp, MCK_GPR64, MCK_MemXExtend8, MCK__93_ }, },
18829   { 5598 /* str */, AArch64::STRBpre, Convert__Reg1_2__FPRAsmOperandFPR81_0__Tie0_3_3__SImm91_3, AMFBS_None, { MCK_FPRAsmOperandFPR8, MCK__91_, MCK_GPR64sp, MCK_SImm9, MCK__93_, MCK__EXCLAIM_ }, },
18910   { 5868 /* stur */, AArch64::STURBi, Convert__FPRAsmOperandFPR81_0__Reg1_2__imm_95_0, AMFBS_None, { MCK_FPRAsmOperandFPR8, MCK__91_, MCK_GPR64sp, MCK__93_ }, },
18917   { 5868 /* stur */, AArch64::STURBi, Convert__FPRAsmOperandFPR81_0__Reg1_2__SImm91_3, AMFBS_None, { MCK_FPRAsmOperandFPR8, MCK__91_, MCK_GPR64sp, MCK_SImm9, MCK__93_ }, },
23526   { 2650 /* ldr */, AArch64::LDRBui, Convert__FPRAsmOperandFPR81_0__Reg1_2__imm_95_0, AMFBS_None, { MCK_FPRAsmOperandFPR8, MCK__91_, MCK_GPR64sp, MCK__93_ }, },
23539   { 2650 /* ldr */, AArch64::LDRBpost, Convert__Reg1_2__FPRAsmOperandFPR81_0__Tie0_3_3__SImm91_4, AMFBS_None, { MCK_FPRAsmOperandFPR8, MCK__91_, MCK_GPR64sp, MCK__93_, MCK_SImm9 }, },
23540   { 2650 /* ldr */, AArch64::LDRBroX, Convert__FPRAsmOperandFPR81_0__Reg1_2__Reg1_3__imm_95_0__imm_95_0, AMFBS_None, { MCK_FPRAsmOperandFPR8, MCK__91_, MCK_GPR64sp, MCK_GPR64, MCK__93_ }, },
23541   { 2650 /* ldr */, AArch64::LDURBi, Convert__FPRAsmOperandFPR81_0__Reg1_2__SImm9OffsetFB81_3, AMFBS_None, { MCK_FPRAsmOperandFPR8, MCK__91_, MCK_GPR64sp, MCK_SImm9OffsetFB8, MCK__93_ }, },
23542   { 2650 /* ldr */, AArch64::LDRBui, Convert__FPRAsmOperandFPR81_0__Reg1_2__UImm12Offset11_3, AMFBS_None, { MCK_FPRAsmOperandFPR8, MCK__91_, MCK_GPR64sp, MCK_UImm12Offset1, MCK__93_ }, },
23565   { 2650 /* ldr */, AArch64::LDRBroW, Convert__FPRAsmOperandFPR81_0__Reg1_2__Reg1_3__MemWExtend82_4, AMFBS_None, { MCK_FPRAsmOperandFPR8, MCK__91_, MCK_GPR64sp, MCK_GPR32, MCK_MemWExtend8, MCK__93_ }, },
23566   { 2650 /* ldr */, AArch64::LDRBroX, Convert__FPRAsmOperandFPR81_0__Reg1_2__Reg1_3__MemXExtend82_4, AMFBS_None, { MCK_FPRAsmOperandFPR8, MCK__91_, MCK_GPR64sp, MCK_GPR64, MCK_MemXExtend8, MCK__93_ }, },
23567   { 2650 /* ldr */, AArch64::LDRBpre, Convert__Reg1_2__FPRAsmOperandFPR81_0__Tie0_3_3__SImm91_3, AMFBS_None, { MCK_FPRAsmOperandFPR8, MCK__91_, MCK_GPR64sp, MCK_SImm9, MCK__93_, MCK__EXCLAIM_ }, },
23745   { 3240 /* ldur */, AArch64::LDURBi, Convert__FPRAsmOperandFPR81_0__Reg1_2__imm_95_0, AMFBS_None, { MCK_FPRAsmOperandFPR8, MCK__91_, MCK_GPR64sp, MCK__93_ }, },
23752   { 3240 /* ldur */, AArch64::LDURBi, Convert__FPRAsmOperandFPR81_0__Reg1_2__SImm91_3, AMFBS_None, { MCK_FPRAsmOperandFPR8, MCK__91_, MCK_GPR64sp, MCK_SImm9, MCK__93_ }, },
26146   { 5598 /* str */, AArch64::STRBui, Convert__FPRAsmOperandFPR81_0__Reg1_2__imm_95_0, AMFBS_None, { MCK_FPRAsmOperandFPR8, MCK__91_, MCK_GPR64sp, MCK__93_ }, },
26159   { 5598 /* str */, AArch64::STRBpost, Convert__Reg1_2__FPRAsmOperandFPR81_0__Tie0_3_3__SImm91_4, AMFBS_None, { MCK_FPRAsmOperandFPR8, MCK__91_, MCK_GPR64sp, MCK__93_, MCK_SImm9 }, },
26160   { 5598 /* str */, AArch64::STRBroX, Convert__FPRAsmOperandFPR81_0__Reg1_2__Reg1_3__imm_95_0__imm_95_0, AMFBS_None, { MCK_FPRAsmOperandFPR8, MCK__91_, MCK_GPR64sp, MCK_GPR64, MCK__93_ }, },
26161   { 5598 /* str */, AArch64::STURBi, Convert__FPRAsmOperandFPR81_0__Reg1_2__SImm9OffsetFB81_3, AMFBS_None, { MCK_FPRAsmOperandFPR8, MCK__91_, MCK_GPR64sp, MCK_SImm9OffsetFB8, MCK__93_ }, },
26162   { 5598 /* str */, AArch64::STRBui, Convert__FPRAsmOperandFPR81_0__Reg1_2__UImm12Offset11_3, AMFBS_None, { MCK_FPRAsmOperandFPR8, MCK__91_, MCK_GPR64sp, MCK_UImm12Offset1, MCK__93_ }, },
26185   { 5598 /* str */, AArch64::STRBroW, Convert__FPRAsmOperandFPR81_0__Reg1_2__Reg1_3__MemWExtend82_4, AMFBS_None, { MCK_FPRAsmOperandFPR8, MCK__91_, MCK_GPR64sp, MCK_GPR32, MCK_MemWExtend8, MCK__93_ }, },
26186   { 5598 /* str */, AArch64::STRBroX, Convert__FPRAsmOperandFPR81_0__Reg1_2__Reg1_3__MemXExtend82_4, AMFBS_None, { MCK_FPRAsmOperandFPR8, MCK__91_, MCK_GPR64sp, MCK_GPR64, MCK_MemXExtend8, MCK__93_ }, },
26187   { 5598 /* str */, AArch64::STRBpre, Convert__Reg1_2__FPRAsmOperandFPR81_0__Tie0_3_3__SImm91_3, AMFBS_None, { MCK_FPRAsmOperandFPR8, MCK__91_, MCK_GPR64sp, MCK_SImm9, MCK__93_, MCK__EXCLAIM_ }, },
26268   { 5868 /* stur */, AArch64::STURBi, Convert__FPRAsmOperandFPR81_0__Reg1_2__imm_95_0, AMFBS_None, { MCK_FPRAsmOperandFPR8, MCK__91_, MCK_GPR64sp, MCK__93_ }, },
26275   { 5868 /* stur */, AArch64::STURBi, Convert__FPRAsmOperandFPR81_0__Reg1_2__SImm91_3, AMFBS_None, { MCK_FPRAsmOperandFPR8, MCK__91_, MCK_GPR64sp, MCK_SImm9, MCK__93_ }, },