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reference, declaration → definition
definition → references, declarations, derived classes, virtual overrides
reference to multiple definitions → definitions
unreferenced
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References
gen/lib/Target/AArch64/AArch64GenAsmMatcher.inc 8911 case MCK_FPImm: {
11977 case MCK_FPImm: return "MCK_FPImm";
13871 { 1173 /* fcpy */, AArch64::FCPY_ZPmI_H, Convert__SVEVectorHReg1_0__Tie0_1_1__SVEPredicateAnyReg1_1__FPImm1_4, AMFBS_HasSVE, { MCK_SVEVectorHReg, MCK_SVEPredicateAnyReg, MCK__47_, MCK_m, MCK_FPImm }, },
13872 { 1173 /* fcpy */, AArch64::FCPY_ZPmI_S, Convert__SVEVectorSReg1_0__Tie0_1_1__SVEPredicateAnyReg1_1__FPImm1_4, AMFBS_HasSVE, { MCK_SVEVectorSReg, MCK_SVEPredicateAnyReg, MCK__47_, MCK_m, MCK_FPImm }, },
13873 { 1173 /* fcpy */, AArch64::FCPY_ZPmI_D, Convert__SVEVectorDReg1_0__Tie0_1_1__SVEPredicateAnyReg1_1__FPImm1_4, AMFBS_HasSVE, { MCK_SVEVectorDReg, MCK_SVEPredicateAnyReg, MCK__47_, MCK_m, MCK_FPImm }, },
14102 { 1339 /* fdup */, AArch64::FDUP_ZI_H, Convert__SVEVectorHReg1_0__FPImm1_1, AMFBS_HasSVE, { MCK_SVEVectorHReg, MCK_FPImm }, },
14103 { 1339 /* fdup */, AArch64::FDUP_ZI_S, Convert__SVEVectorSReg1_0__FPImm1_1, AMFBS_HasSVE, { MCK_SVEVectorSReg, MCK_FPImm }, },
14104 { 1339 /* fdup */, AArch64::FDUP_ZI_D, Convert__SVEVectorDReg1_0__FPImm1_1, AMFBS_HasSVE, { MCK_SVEVectorDReg, MCK_FPImm }, },
14307 { 1519 /* fmov */, AArch64::FMOVHi, Convert__Reg1_0__FPImm1_1, AMFBS_HasFullFP16, { MCK_FPR16, MCK_FPImm }, },
14310 { 1519 /* fmov */, AArch64::FMOVSi, Convert__Reg1_0__FPImm1_1, AMFBS_HasFPARMv8, { MCK_FPR32, MCK_FPImm }, },
14313 { 1519 /* fmov */, AArch64::FMOVDi, Convert__Reg1_0__FPImm1_1, AMFBS_HasFPARMv8, { MCK_FPR64, MCK_FPImm }, },
14318 { 1519 /* fmov */, AArch64::FDUP_ZI_H, Convert__SVEVectorHReg1_0__FPImm1_1, AMFBS_HasSVE, { MCK_SVEVectorHReg, MCK_FPImm }, },
14319 { 1519 /* fmov */, AArch64::FDUP_ZI_S, Convert__SVEVectorSReg1_0__FPImm1_1, AMFBS_HasSVE, { MCK_SVEVectorSReg, MCK_FPImm }, },
14320 { 1519 /* fmov */, AArch64::FDUP_ZI_D, Convert__SVEVectorDReg1_0__FPImm1_1, AMFBS_HasSVE, { MCK_SVEVectorDReg, MCK_FPImm }, },
14324 { 1519 /* fmov */, AArch64::FMOVv2f64_ns, Convert__VectorReg1281_0__FPImm1_2, AMFBS_HasNEON, { MCK_VectorReg128, MCK__DOT_2d, MCK_FPImm }, },
14325 { 1519 /* fmov */, AArch64::FMOVv4f32_ns, Convert__VectorReg1281_0__FPImm1_2, AMFBS_HasNEON, { MCK_VectorReg128, MCK__DOT_4s, MCK_FPImm }, },
14326 { 1519 /* fmov */, AArch64::FMOVv8f16_ns, Convert__VectorReg1281_0__FPImm1_2, AMFBS_HasNEON_HasFullFP16, { MCK_VectorReg128, MCK__DOT_8h, MCK_FPImm }, },
14327 { 1519 /* fmov */, AArch64::FMOVv2f32_ns, Convert__VectorReg641_0__FPImm1_2, AMFBS_HasNEON, { MCK_VectorReg64, MCK__DOT_2s, MCK_FPImm }, },
14328 { 1519 /* fmov */, AArch64::FMOVv4f16_ns, Convert__VectorReg641_0__FPImm1_2, AMFBS_HasNEON_HasFullFP16, { MCK_VectorReg64, MCK__DOT_4h, MCK_FPImm }, },
14334 { 1519 /* fmov */, AArch64::FCPY_ZPmI_H, Convert__SVEVectorHReg1_0__Tie0_1_1__SVEPredicateAnyReg1_1__FPImm1_4, AMFBS_HasSVE, { MCK_SVEVectorHReg, MCK_SVEPredicateAnyReg, MCK__47_, MCK_m, MCK_FPImm }, },
14335 { 1519 /* fmov */, AArch64::FCPY_ZPmI_S, Convert__SVEVectorSReg1_0__Tie0_1_1__SVEPredicateAnyReg1_1__FPImm1_4, AMFBS_HasSVE, { MCK_SVEVectorSReg, MCK_SVEPredicateAnyReg, MCK__47_, MCK_m, MCK_FPImm }, },
14336 { 1519 /* fmov */, AArch64::FCPY_ZPmI_D, Convert__SVEVectorDReg1_0__Tie0_1_1__SVEPredicateAnyReg1_1__FPImm1_4, AMFBS_HasSVE, { MCK_SVEVectorDReg, MCK_SVEPredicateAnyReg, MCK__47_, MCK_m, MCK_FPImm }, },
21229 { 1173 /* fcpy */, AArch64::FCPY_ZPmI_H, Convert__SVEVectorHReg1_0__Tie0_1_1__SVEPredicateAnyReg1_1__FPImm1_4, AMFBS_HasSVE, { MCK_SVEVectorHReg, MCK_SVEPredicateAnyReg, MCK__47_, MCK_m, MCK_FPImm }, },
21230 { 1173 /* fcpy */, AArch64::FCPY_ZPmI_S, Convert__SVEVectorSReg1_0__Tie0_1_1__SVEPredicateAnyReg1_1__FPImm1_4, AMFBS_HasSVE, { MCK_SVEVectorSReg, MCK_SVEPredicateAnyReg, MCK__47_, MCK_m, MCK_FPImm }, },
21231 { 1173 /* fcpy */, AArch64::FCPY_ZPmI_D, Convert__SVEVectorDReg1_0__Tie0_1_1__SVEPredicateAnyReg1_1__FPImm1_4, AMFBS_HasSVE, { MCK_SVEVectorDReg, MCK_SVEPredicateAnyReg, MCK__47_, MCK_m, MCK_FPImm }, },
21460 { 1339 /* fdup */, AArch64::FDUP_ZI_H, Convert__SVEVectorHReg1_0__FPImm1_1, AMFBS_HasSVE, { MCK_SVEVectorHReg, MCK_FPImm }, },
21461 { 1339 /* fdup */, AArch64::FDUP_ZI_S, Convert__SVEVectorSReg1_0__FPImm1_1, AMFBS_HasSVE, { MCK_SVEVectorSReg, MCK_FPImm }, },
21462 { 1339 /* fdup */, AArch64::FDUP_ZI_D, Convert__SVEVectorDReg1_0__FPImm1_1, AMFBS_HasSVE, { MCK_SVEVectorDReg, MCK_FPImm }, },
21665 { 1519 /* fmov */, AArch64::FMOVHi, Convert__Reg1_0__FPImm1_1, AMFBS_HasFullFP16, { MCK_FPR16, MCK_FPImm }, },
21668 { 1519 /* fmov */, AArch64::FMOVSi, Convert__Reg1_0__FPImm1_1, AMFBS_HasFPARMv8, { MCK_FPR32, MCK_FPImm }, },
21671 { 1519 /* fmov */, AArch64::FMOVDi, Convert__Reg1_0__FPImm1_1, AMFBS_HasFPARMv8, { MCK_FPR64, MCK_FPImm }, },
21676 { 1519 /* fmov */, AArch64::FDUP_ZI_H, Convert__SVEVectorHReg1_0__FPImm1_1, AMFBS_HasSVE, { MCK_SVEVectorHReg, MCK_FPImm }, },
21677 { 1519 /* fmov */, AArch64::FDUP_ZI_S, Convert__SVEVectorSReg1_0__FPImm1_1, AMFBS_HasSVE, { MCK_SVEVectorSReg, MCK_FPImm }, },
21678 { 1519 /* fmov */, AArch64::FDUP_ZI_D, Convert__SVEVectorDReg1_0__FPImm1_1, AMFBS_HasSVE, { MCK_SVEVectorDReg, MCK_FPImm }, },
21679 { 1519 /* fmov */, AArch64::FMOVv2f64_ns, Convert__VectorReg1281_1__FPImm1_2, AMFBS_HasNEON, { MCK__DOT_2d, MCK_VectorReg128, MCK_FPImm }, },
21680 { 1519 /* fmov */, AArch64::FMOVv2f32_ns, Convert__VectorReg641_1__FPImm1_2, AMFBS_HasNEON, { MCK__DOT_2s, MCK_VectorReg64, MCK_FPImm }, },
21681 { 1519 /* fmov */, AArch64::FMOVv4f16_ns, Convert__VectorReg641_1__FPImm1_2, AMFBS_HasNEON_HasFullFP16, { MCK__DOT_4h, MCK_VectorReg64, MCK_FPImm }, },
21682 { 1519 /* fmov */, AArch64::FMOVv4f32_ns, Convert__VectorReg1281_1__FPImm1_2, AMFBS_HasNEON, { MCK__DOT_4s, MCK_VectorReg128, MCK_FPImm }, },
21683 { 1519 /* fmov */, AArch64::FMOVv8f16_ns, Convert__VectorReg1281_1__FPImm1_2, AMFBS_HasNEON_HasFullFP16, { MCK__DOT_8h, MCK_VectorReg128, MCK_FPImm }, },
21692 { 1519 /* fmov */, AArch64::FCPY_ZPmI_H, Convert__SVEVectorHReg1_0__Tie0_1_1__SVEPredicateAnyReg1_1__FPImm1_4, AMFBS_HasSVE, { MCK_SVEVectorHReg, MCK_SVEPredicateAnyReg, MCK__47_, MCK_m, MCK_FPImm }, },
21693 { 1519 /* fmov */, AArch64::FCPY_ZPmI_S, Convert__SVEVectorSReg1_0__Tie0_1_1__SVEPredicateAnyReg1_1__FPImm1_4, AMFBS_HasSVE, { MCK_SVEVectorSReg, MCK_SVEPredicateAnyReg, MCK__47_, MCK_m, MCK_FPImm }, },
21694 { 1519 /* fmov */, AArch64::FCPY_ZPmI_D, Convert__SVEVectorDReg1_0__Tie0_1_1__SVEPredicateAnyReg1_1__FPImm1_4, AMFBS_HasSVE, { MCK_SVEVectorDReg, MCK_SVEPredicateAnyReg, MCK__47_, MCK_m, MCK_FPImm }, },
29838 { 1173 /* fcpy */, 16 /* 4 */, MCK_FPImm, AMFBS_HasSVE },
29841 { 1173 /* fcpy */, 16 /* 4 */, MCK_FPImm, AMFBS_HasSVE },
29844 { 1173 /* fcpy */, 16 /* 4 */, MCK_FPImm, AMFBS_HasSVE },
29847 { 1173 /* fcpy */, 16 /* 4 */, MCK_FPImm, AMFBS_HasSVE },
29850 { 1173 /* fcpy */, 16 /* 4 */, MCK_FPImm, AMFBS_HasSVE },
29853 { 1173 /* fcpy */, 16 /* 4 */, MCK_FPImm, AMFBS_HasSVE },
30024 { 1339 /* fdup */, 2 /* 1 */, MCK_FPImm, AMFBS_HasSVE },
30026 { 1339 /* fdup */, 2 /* 1 */, MCK_FPImm, AMFBS_HasSVE },
30028 { 1339 /* fdup */, 2 /* 1 */, MCK_FPImm, AMFBS_HasSVE },
30030 { 1339 /* fdup */, 2 /* 1 */, MCK_FPImm, AMFBS_HasSVE },
30032 { 1339 /* fdup */, 2 /* 1 */, MCK_FPImm, AMFBS_HasSVE },
30034 { 1339 /* fdup */, 2 /* 1 */, MCK_FPImm, AMFBS_HasSVE },
30370 { 1519 /* fmov */, 2 /* 1 */, MCK_FPImm, AMFBS_HasFullFP16 },
30371 { 1519 /* fmov */, 2 /* 1 */, MCK_FPImm, AMFBS_HasFullFP16 },
30372 { 1519 /* fmov */, 2 /* 1 */, MCK_FPImm, AMFBS_HasFPARMv8 },
30373 { 1519 /* fmov */, 2 /* 1 */, MCK_FPImm, AMFBS_HasFPARMv8 },
30374 { 1519 /* fmov */, 2 /* 1 */, MCK_FPImm, AMFBS_HasFPARMv8 },
30375 { 1519 /* fmov */, 2 /* 1 */, MCK_FPImm, AMFBS_HasFPARMv8 },
30376 { 1519 /* fmov */, 2 /* 1 */, MCK_FPImm, AMFBS_HasSVE },
30378 { 1519 /* fmov */, 2 /* 1 */, MCK_FPImm, AMFBS_HasSVE },
30380 { 1519 /* fmov */, 2 /* 1 */, MCK_FPImm, AMFBS_HasSVE },
30382 { 1519 /* fmov */, 2 /* 1 */, MCK_FPImm, AMFBS_HasSVE },
30384 { 1519 /* fmov */, 2 /* 1 */, MCK_FPImm, AMFBS_HasSVE },
30386 { 1519 /* fmov */, 2 /* 1 */, MCK_FPImm, AMFBS_HasSVE },
30388 { 1519 /* fmov */, 4 /* 2 */, MCK_FPImm, AMFBS_HasNEON },
30389 { 1519 /* fmov */, 4 /* 2 */, MCK_FPImm, AMFBS_HasNEON },
30390 { 1519 /* fmov */, 4 /* 2 */, MCK_FPImm, AMFBS_HasNEON_HasFullFP16 },
30391 { 1519 /* fmov */, 4 /* 2 */, MCK_FPImm, AMFBS_HasNEON },
30392 { 1519 /* fmov */, 4 /* 2 */, MCK_FPImm, AMFBS_HasNEON_HasFullFP16 },
30393 { 1519 /* fmov */, 4 /* 2 */, MCK_FPImm, AMFBS_HasNEON },
30394 { 1519 /* fmov */, 4 /* 2 */, MCK_FPImm, AMFBS_HasNEON },
30395 { 1519 /* fmov */, 4 /* 2 */, MCK_FPImm, AMFBS_HasNEON_HasFullFP16 },
30396 { 1519 /* fmov */, 4 /* 2 */, MCK_FPImm, AMFBS_HasNEON },
30397 { 1519 /* fmov */, 4 /* 2 */, MCK_FPImm, AMFBS_HasNEON_HasFullFP16 },
30404 { 1519 /* fmov */, 16 /* 4 */, MCK_FPImm, AMFBS_HasSVE },
30407 { 1519 /* fmov */, 16 /* 4 */, MCK_FPImm, AMFBS_HasSVE },
30410 { 1519 /* fmov */, 16 /* 4 */, MCK_FPImm, AMFBS_HasSVE },
30413 { 1519 /* fmov */, 16 /* 4 */, MCK_FPImm, AMFBS_HasSVE },
30416 { 1519 /* fmov */, 16 /* 4 */, MCK_FPImm, AMFBS_HasSVE },
30419 { 1519 /* fmov */, 16 /* 4 */, MCK_FPImm, AMFBS_HasSVE },
40647 case MCK_FPImm: