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reference, declaration → definition
definition → references, declarations, derived classes, virtual overrides
reference to multiple definitions → definitions
unreferenced
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References
gen/lib/Target/AArch64/AArch64GenAsmMatcher.inc 8756 return B == MCK_Extend;
8759 return B == MCK_Extend;
8902 case MCK_Extend: {
11976 case MCK_Extend: return "MCK_Extend";
12724 { 25 /* add */, AArch64::ADDWrx, Convert__Reg1_0__Reg1_1__Reg1_2__Extend1_3, AMFBS_None, { MCK_GPR32sp, MCK_GPR32sp, MCK_GPR32, MCK_Extend }, },
12774 { 72 /* adds */, AArch64::ADDSWrx, Convert__Reg1_0__Reg1_1__Reg1_2__Extend1_3, AMFBS_None, { MCK_GPR32, MCK_GPR32sp, MCK_GPR32, MCK_Extend }, },
12776 { 72 /* adds */, AArch64::ADDSXrx, Convert__Reg1_0__Reg1_1__Reg1_2__Extend1_3, AMFBS_None, { MCK_GPR64, MCK_GPR64sp, MCK_GPR32, MCK_Extend }, },
13211 { 661 /* cmn */, AArch64::ADDSWrx, Convert__regWZR__Reg1_0__Reg1_1__Extend1_2, AMFBS_None, { MCK_GPR32sp, MCK_GPR32, MCK_Extend }, },
13213 { 661 /* cmn */, AArch64::ADDSXrx, Convert__regXZR__Reg1_0__Reg1_1__Extend1_2, AMFBS_None, { MCK_GPR64sp, MCK_GPR32, MCK_Extend }, },
13224 { 665 /* cmp */, AArch64::SUBSWrx, Convert__regWZR__Reg1_0__Reg1_1__Extend1_2, AMFBS_None, { MCK_GPR32sp, MCK_GPR32, MCK_Extend }, },
13226 { 665 /* cmp */, AArch64::SUBSXrx, Convert__regXZR__Reg1_0__Reg1_1__Extend1_2, AMFBS_None, { MCK_GPR64sp, MCK_GPR32, MCK_Extend }, },
18961 { 5924 /* sub */, AArch64::SUBWrx, Convert__Reg1_0__Reg1_1__Reg1_2__Extend1_3, AMFBS_None, { MCK_GPR32sp, MCK_GPR32sp, MCK_GPR32, MCK_Extend }, },
19008 { 5976 /* subs */, AArch64::SUBSWrx, Convert__Reg1_0__Reg1_1__Reg1_2__Extend1_3, AMFBS_None, { MCK_GPR32, MCK_GPR32sp, MCK_GPR32, MCK_Extend }, },
19010 { 5976 /* subs */, AArch64::SUBSXrx, Convert__Reg1_0__Reg1_1__Reg1_2__Extend1_3, AMFBS_None, { MCK_GPR64, MCK_GPR64sp, MCK_GPR32, MCK_Extend }, },
20089 { 25 /* add */, AArch64::ADDWrx, Convert__Reg1_0__Reg1_1__Reg1_2__Extend1_3, AMFBS_None, { MCK_GPR32sp, MCK_GPR32sp, MCK_GPR32, MCK_Extend }, },
20132 { 72 /* adds */, AArch64::ADDSWrx, Convert__Reg1_0__Reg1_1__Reg1_2__Extend1_3, AMFBS_None, { MCK_GPR32, MCK_GPR32sp, MCK_GPR32, MCK_Extend }, },
20134 { 72 /* adds */, AArch64::ADDSXrx, Convert__Reg1_0__Reg1_1__Reg1_2__Extend1_3, AMFBS_None, { MCK_GPR64, MCK_GPR64sp, MCK_GPR32, MCK_Extend }, },
20569 { 661 /* cmn */, AArch64::ADDSWrx, Convert__regWZR__Reg1_0__Reg1_1__Extend1_2, AMFBS_None, { MCK_GPR32sp, MCK_GPR32, MCK_Extend }, },
20571 { 661 /* cmn */, AArch64::ADDSXrx, Convert__regXZR__Reg1_0__Reg1_1__Extend1_2, AMFBS_None, { MCK_GPR64sp, MCK_GPR32, MCK_Extend }, },
20582 { 665 /* cmp */, AArch64::SUBSWrx, Convert__regWZR__Reg1_0__Reg1_1__Extend1_2, AMFBS_None, { MCK_GPR32sp, MCK_GPR32, MCK_Extend }, },
20584 { 665 /* cmp */, AArch64::SUBSXrx, Convert__regXZR__Reg1_0__Reg1_1__Extend1_2, AMFBS_None, { MCK_GPR64sp, MCK_GPR32, MCK_Extend }, },
26326 { 5924 /* sub */, AArch64::SUBWrx, Convert__Reg1_0__Reg1_1__Reg1_2__Extend1_3, AMFBS_None, { MCK_GPR32sp, MCK_GPR32sp, MCK_GPR32, MCK_Extend }, },
26366 { 5976 /* subs */, AArch64::SUBSWrx, Convert__Reg1_0__Reg1_1__Reg1_2__Extend1_3, AMFBS_None, { MCK_GPR32, MCK_GPR32sp, MCK_GPR32, MCK_Extend }, },
26368 { 5976 /* subs */, AArch64::SUBSXrx, Convert__Reg1_0__Reg1_1__Reg1_2__Extend1_3, AMFBS_None, { MCK_GPR64, MCK_GPR64sp, MCK_GPR32, MCK_Extend }, },