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reference, declaration → definition
definition → references, declarations, derived classes, virtual overrides
reference to multiple definitions → definitions
unreferenced
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References
gen/lib/Target/AArch64/AArch64GenAsmMatcher.inc 8875 case MCK_CondCode: {
11973 case MCK_CondCode: return "MCK_CondCode";
12890 { 262 /* b */, AArch64::Bcc, Convert__CondCode1_1__PCRelLabel191_2, AMFBS_None, { MCK__DOT_, MCK_CondCode, MCK_PCRelLabel19 }, },
13017 { 552 /* ccmn */, AArch64::CCMNWr, Convert__Reg1_0__Reg1_1__Imm0_151_2__CondCode1_3, AMFBS_None, { MCK_GPR32, MCK_GPR32, MCK_Imm0_15, MCK_CondCode }, },
13018 { 552 /* ccmn */, AArch64::CCMNWi, Convert__Reg1_0__Imm0_311_1__Imm0_151_2__CondCode1_3, AMFBS_None, { MCK_GPR32, MCK_Imm0_31, MCK_Imm0_15, MCK_CondCode }, },
13019 { 552 /* ccmn */, AArch64::CCMNXr, Convert__Reg1_0__Reg1_1__Imm0_151_2__CondCode1_3, AMFBS_None, { MCK_GPR64, MCK_GPR64, MCK_Imm0_15, MCK_CondCode }, },
13020 { 552 /* ccmn */, AArch64::CCMNXi, Convert__Reg1_0__Imm0_311_1__Imm0_151_2__CondCode1_3, AMFBS_None, { MCK_GPR64, MCK_Imm0_31, MCK_Imm0_15, MCK_CondCode }, },
13021 { 557 /* ccmp */, AArch64::CCMPWr, Convert__Reg1_0__Reg1_1__Imm0_151_2__CondCode1_3, AMFBS_None, { MCK_GPR32, MCK_GPR32, MCK_Imm0_15, MCK_CondCode }, },
13022 { 557 /* ccmp */, AArch64::CCMPWi, Convert__Reg1_0__Imm0_311_1__Imm0_151_2__CondCode1_3, AMFBS_None, { MCK_GPR32, MCK_Imm0_31, MCK_Imm0_15, MCK_CondCode }, },
13023 { 557 /* ccmp */, AArch64::CCMPXr, Convert__Reg1_0__Reg1_1__Imm0_151_2__CondCode1_3, AMFBS_None, { MCK_GPR64, MCK_GPR64, MCK_Imm0_15, MCK_CondCode }, },
13024 { 557 /* ccmp */, AArch64::CCMPXi, Convert__Reg1_0__Imm0_311_1__Imm0_151_2__CondCode1_3, AMFBS_None, { MCK_GPR64, MCK_Imm0_31, MCK_Imm0_15, MCK_CondCode }, },
13030 { 573 /* cinc */, AArch64::CSINCWr, Convert__Reg1_0__Reg1_1__Reg1_1__CondCode1_2, AMFBS_None, { MCK_GPR32, MCK_GPR32, MCK_CondCode }, },
13031 { 573 /* cinc */, AArch64::CSINCXr, Convert__Reg1_0__Reg1_1__Reg1_1__CondCode1_2, AMFBS_None, { MCK_GPR64, MCK_GPR64, MCK_CondCode }, },
13032 { 578 /* cinv */, AArch64::CSINVWr, Convert__Reg1_0__Reg1_1__Reg1_1__CondCode1_2, AMFBS_None, { MCK_GPR32, MCK_GPR32, MCK_CondCode }, },
13033 { 578 /* cinv */, AArch64::CSINVXr, Convert__Reg1_0__Reg1_1__Reg1_1__CondCode1_2, AMFBS_None, { MCK_GPR64, MCK_GPR64, MCK_CondCode }, },
13347 { 740 /* cneg */, AArch64::CSNEGWr, Convert__Reg1_0__Reg1_1__Reg1_1__CondCode1_2, AMFBS_None, { MCK_GPR32, MCK_GPR32, MCK_CondCode }, },
13348 { 740 /* cneg */, AArch64::CSNEGXr, Convert__Reg1_0__Reg1_1__Reg1_1__CondCode1_2, AMFBS_None, { MCK_GPR64, MCK_GPR64, MCK_CondCode }, },
13402 { 856 /* csel */, AArch64::CSELWr, Convert__Reg1_0__Reg1_1__Reg1_2__CondCode1_3, AMFBS_None, { MCK_GPR32, MCK_GPR32, MCK_GPR32, MCK_CondCode }, },
13403 { 856 /* csel */, AArch64::CSELXr, Convert__Reg1_0__Reg1_1__Reg1_2__CondCode1_3, AMFBS_None, { MCK_GPR64, MCK_GPR64, MCK_GPR64, MCK_CondCode }, },
13404 { 861 /* cset */, AArch64::CSINCWr, Convert__Reg1_0__regWZR__regWZR__CondCode1_1, AMFBS_None, { MCK_GPR32, MCK_CondCode }, },
13405 { 861 /* cset */, AArch64::CSINCXr, Convert__Reg1_0__regXZR__regXZR__CondCode1_1, AMFBS_None, { MCK_GPR64, MCK_CondCode }, },
13406 { 866 /* csetm */, AArch64::CSINVWr, Convert__Reg1_0__regWZR__regWZR__CondCode1_1, AMFBS_None, { MCK_GPR32, MCK_CondCode }, },
13407 { 866 /* csetm */, AArch64::CSINVXr, Convert__Reg1_0__regXZR__regXZR__CondCode1_1, AMFBS_None, { MCK_GPR64, MCK_CondCode }, },
13408 { 872 /* csinc */, AArch64::CSINCWr, Convert__Reg1_0__Reg1_1__Reg1_2__CondCode1_3, AMFBS_None, { MCK_GPR32, MCK_GPR32, MCK_GPR32, MCK_CondCode }, },
13409 { 872 /* csinc */, AArch64::CSINCXr, Convert__Reg1_0__Reg1_1__Reg1_2__CondCode1_3, AMFBS_None, { MCK_GPR64, MCK_GPR64, MCK_GPR64, MCK_CondCode }, },
13410 { 878 /* csinv */, AArch64::CSINVWr, Convert__Reg1_0__Reg1_1__Reg1_2__CondCode1_3, AMFBS_None, { MCK_GPR32, MCK_GPR32, MCK_GPR32, MCK_CondCode }, },
13411 { 878 /* csinv */, AArch64::CSINVXr, Convert__Reg1_0__Reg1_1__Reg1_2__CondCode1_3, AMFBS_None, { MCK_GPR64, MCK_GPR64, MCK_GPR64, MCK_CondCode }, },
13412 { 884 /* csneg */, AArch64::CSNEGWr, Convert__Reg1_0__Reg1_1__Reg1_2__CondCode1_3, AMFBS_None, { MCK_GPR32, MCK_GPR32, MCK_GPR32, MCK_CondCode }, },
13413 { 884 /* csneg */, AArch64::CSNEGXr, Convert__Reg1_0__Reg1_1__Reg1_2__CondCode1_3, AMFBS_None, { MCK_GPR64, MCK_GPR64, MCK_GPR64, MCK_CondCode }, },
13658 { 1101 /* fccmp */, AArch64::FCCMPHrr, Convert__Reg1_0__Reg1_1__Imm0_151_2__CondCode1_3, AMFBS_HasFullFP16, { MCK_FPR16, MCK_FPR16, MCK_Imm0_15, MCK_CondCode }, },
13659 { 1101 /* fccmp */, AArch64::FCCMPSrr, Convert__Reg1_0__Reg1_1__Imm0_151_2__CondCode1_3, AMFBS_HasFPARMv8, { MCK_FPR32, MCK_FPR32, MCK_Imm0_15, MCK_CondCode }, },
13660 { 1101 /* fccmp */, AArch64::FCCMPDrr, Convert__Reg1_0__Reg1_1__Imm0_151_2__CondCode1_3, AMFBS_HasFPARMv8, { MCK_FPR64, MCK_FPR64, MCK_Imm0_15, MCK_CondCode }, },
13661 { 1107 /* fccmpe */, AArch64::FCCMPEHrr, Convert__Reg1_0__Reg1_1__Imm0_151_2__CondCode1_3, AMFBS_HasFullFP16, { MCK_FPR16, MCK_FPR16, MCK_Imm0_15, MCK_CondCode }, },
13662 { 1107 /* fccmpe */, AArch64::FCCMPESrr, Convert__Reg1_0__Reg1_1__Imm0_151_2__CondCode1_3, AMFBS_HasFPARMv8, { MCK_FPR32, MCK_FPR32, MCK_Imm0_15, MCK_CondCode }, },
13663 { 1107 /* fccmpe */, AArch64::FCCMPEDrr, Convert__Reg1_0__Reg1_1__Imm0_151_2__CondCode1_3, AMFBS_HasFPARMv8, { MCK_FPR64, MCK_FPR64, MCK_Imm0_15, MCK_CondCode }, },
13874 { 1178 /* fcsel */, AArch64::FCSELHrrr, Convert__Reg1_0__Reg1_1__Reg1_2__CondCode1_3, AMFBS_HasFullFP16, { MCK_FPR16, MCK_FPR16, MCK_FPR16, MCK_CondCode }, },
13875 { 1178 /* fcsel */, AArch64::FCSELSrrr, Convert__Reg1_0__Reg1_1__Reg1_2__CondCode1_3, AMFBS_HasFPARMv8, { MCK_FPR32, MCK_FPR32, MCK_FPR32, MCK_CondCode }, },
13876 { 1178 /* fcsel */, AArch64::FCSELDrrr, Convert__Reg1_0__Reg1_1__Reg1_2__CondCode1_3, AMFBS_HasFPARMv8, { MCK_FPR64, MCK_FPR64, MCK_FPR64, MCK_CondCode }, },
20248 { 262 /* b */, AArch64::Bcc, Convert__CondCode1_1__PCRelLabel191_2, AMFBS_None, { MCK__DOT_, MCK_CondCode, MCK_PCRelLabel19 }, },
20375 { 552 /* ccmn */, AArch64::CCMNWr, Convert__Reg1_0__Reg1_1__Imm0_151_2__CondCode1_3, AMFBS_None, { MCK_GPR32, MCK_GPR32, MCK_Imm0_15, MCK_CondCode }, },
20376 { 552 /* ccmn */, AArch64::CCMNWi, Convert__Reg1_0__Imm0_311_1__Imm0_151_2__CondCode1_3, AMFBS_None, { MCK_GPR32, MCK_Imm0_31, MCK_Imm0_15, MCK_CondCode }, },
20377 { 552 /* ccmn */, AArch64::CCMNXr, Convert__Reg1_0__Reg1_1__Imm0_151_2__CondCode1_3, AMFBS_None, { MCK_GPR64, MCK_GPR64, MCK_Imm0_15, MCK_CondCode }, },
20378 { 552 /* ccmn */, AArch64::CCMNXi, Convert__Reg1_0__Imm0_311_1__Imm0_151_2__CondCode1_3, AMFBS_None, { MCK_GPR64, MCK_Imm0_31, MCK_Imm0_15, MCK_CondCode }, },
20379 { 557 /* ccmp */, AArch64::CCMPWr, Convert__Reg1_0__Reg1_1__Imm0_151_2__CondCode1_3, AMFBS_None, { MCK_GPR32, MCK_GPR32, MCK_Imm0_15, MCK_CondCode }, },
20380 { 557 /* ccmp */, AArch64::CCMPWi, Convert__Reg1_0__Imm0_311_1__Imm0_151_2__CondCode1_3, AMFBS_None, { MCK_GPR32, MCK_Imm0_31, MCK_Imm0_15, MCK_CondCode }, },
20381 { 557 /* ccmp */, AArch64::CCMPXr, Convert__Reg1_0__Reg1_1__Imm0_151_2__CondCode1_3, AMFBS_None, { MCK_GPR64, MCK_GPR64, MCK_Imm0_15, MCK_CondCode }, },
20382 { 557 /* ccmp */, AArch64::CCMPXi, Convert__Reg1_0__Imm0_311_1__Imm0_151_2__CondCode1_3, AMFBS_None, { MCK_GPR64, MCK_Imm0_31, MCK_Imm0_15, MCK_CondCode }, },
20388 { 573 /* cinc */, AArch64::CSINCWr, Convert__Reg1_0__Reg1_1__Reg1_1__CondCode1_2, AMFBS_None, { MCK_GPR32, MCK_GPR32, MCK_CondCode }, },
20389 { 573 /* cinc */, AArch64::CSINCXr, Convert__Reg1_0__Reg1_1__Reg1_1__CondCode1_2, AMFBS_None, { MCK_GPR64, MCK_GPR64, MCK_CondCode }, },
20390 { 578 /* cinv */, AArch64::CSINVWr, Convert__Reg1_0__Reg1_1__Reg1_1__CondCode1_2, AMFBS_None, { MCK_GPR32, MCK_GPR32, MCK_CondCode }, },
20391 { 578 /* cinv */, AArch64::CSINVXr, Convert__Reg1_0__Reg1_1__Reg1_1__CondCode1_2, AMFBS_None, { MCK_GPR64, MCK_GPR64, MCK_CondCode }, },
20705 { 740 /* cneg */, AArch64::CSNEGWr, Convert__Reg1_0__Reg1_1__Reg1_1__CondCode1_2, AMFBS_None, { MCK_GPR32, MCK_GPR32, MCK_CondCode }, },
20706 { 740 /* cneg */, AArch64::CSNEGXr, Convert__Reg1_0__Reg1_1__Reg1_1__CondCode1_2, AMFBS_None, { MCK_GPR64, MCK_GPR64, MCK_CondCode }, },
20760 { 856 /* csel */, AArch64::CSELWr, Convert__Reg1_0__Reg1_1__Reg1_2__CondCode1_3, AMFBS_None, { MCK_GPR32, MCK_GPR32, MCK_GPR32, MCK_CondCode }, },
20761 { 856 /* csel */, AArch64::CSELXr, Convert__Reg1_0__Reg1_1__Reg1_2__CondCode1_3, AMFBS_None, { MCK_GPR64, MCK_GPR64, MCK_GPR64, MCK_CondCode }, },
20762 { 861 /* cset */, AArch64::CSINCWr, Convert__Reg1_0__regWZR__regWZR__CondCode1_1, AMFBS_None, { MCK_GPR32, MCK_CondCode }, },
20763 { 861 /* cset */, AArch64::CSINCXr, Convert__Reg1_0__regXZR__regXZR__CondCode1_1, AMFBS_None, { MCK_GPR64, MCK_CondCode }, },
20764 { 866 /* csetm */, AArch64::CSINVWr, Convert__Reg1_0__regWZR__regWZR__CondCode1_1, AMFBS_None, { MCK_GPR32, MCK_CondCode }, },
20765 { 866 /* csetm */, AArch64::CSINVXr, Convert__Reg1_0__regXZR__regXZR__CondCode1_1, AMFBS_None, { MCK_GPR64, MCK_CondCode }, },
20766 { 872 /* csinc */, AArch64::CSINCWr, Convert__Reg1_0__Reg1_1__Reg1_2__CondCode1_3, AMFBS_None, { MCK_GPR32, MCK_GPR32, MCK_GPR32, MCK_CondCode }, },
20767 { 872 /* csinc */, AArch64::CSINCXr, Convert__Reg1_0__Reg1_1__Reg1_2__CondCode1_3, AMFBS_None, { MCK_GPR64, MCK_GPR64, MCK_GPR64, MCK_CondCode }, },
20768 { 878 /* csinv */, AArch64::CSINVWr, Convert__Reg1_0__Reg1_1__Reg1_2__CondCode1_3, AMFBS_None, { MCK_GPR32, MCK_GPR32, MCK_GPR32, MCK_CondCode }, },
20769 { 878 /* csinv */, AArch64::CSINVXr, Convert__Reg1_0__Reg1_1__Reg1_2__CondCode1_3, AMFBS_None, { MCK_GPR64, MCK_GPR64, MCK_GPR64, MCK_CondCode }, },
20770 { 884 /* csneg */, AArch64::CSNEGWr, Convert__Reg1_0__Reg1_1__Reg1_2__CondCode1_3, AMFBS_None, { MCK_GPR32, MCK_GPR32, MCK_GPR32, MCK_CondCode }, },
20771 { 884 /* csneg */, AArch64::CSNEGXr, Convert__Reg1_0__Reg1_1__Reg1_2__CondCode1_3, AMFBS_None, { MCK_GPR64, MCK_GPR64, MCK_GPR64, MCK_CondCode }, },
21016 { 1101 /* fccmp */, AArch64::FCCMPHrr, Convert__Reg1_0__Reg1_1__Imm0_151_2__CondCode1_3, AMFBS_HasFullFP16, { MCK_FPR16, MCK_FPR16, MCK_Imm0_15, MCK_CondCode }, },
21017 { 1101 /* fccmp */, AArch64::FCCMPSrr, Convert__Reg1_0__Reg1_1__Imm0_151_2__CondCode1_3, AMFBS_HasFPARMv8, { MCK_FPR32, MCK_FPR32, MCK_Imm0_15, MCK_CondCode }, },
21018 { 1101 /* fccmp */, AArch64::FCCMPDrr, Convert__Reg1_0__Reg1_1__Imm0_151_2__CondCode1_3, AMFBS_HasFPARMv8, { MCK_FPR64, MCK_FPR64, MCK_Imm0_15, MCK_CondCode }, },
21019 { 1107 /* fccmpe */, AArch64::FCCMPEHrr, Convert__Reg1_0__Reg1_1__Imm0_151_2__CondCode1_3, AMFBS_HasFullFP16, { MCK_FPR16, MCK_FPR16, MCK_Imm0_15, MCK_CondCode }, },
21020 { 1107 /* fccmpe */, AArch64::FCCMPESrr, Convert__Reg1_0__Reg1_1__Imm0_151_2__CondCode1_3, AMFBS_HasFPARMv8, { MCK_FPR32, MCK_FPR32, MCK_Imm0_15, MCK_CondCode }, },
21021 { 1107 /* fccmpe */, AArch64::FCCMPEDrr, Convert__Reg1_0__Reg1_1__Imm0_151_2__CondCode1_3, AMFBS_HasFPARMv8, { MCK_FPR64, MCK_FPR64, MCK_Imm0_15, MCK_CondCode }, },
21232 { 1178 /* fcsel */, AArch64::FCSELHrrr, Convert__Reg1_0__Reg1_1__Reg1_2__CondCode1_3, AMFBS_HasFullFP16, { MCK_FPR16, MCK_FPR16, MCK_FPR16, MCK_CondCode }, },
21233 { 1178 /* fcsel */, AArch64::FCSELSrrr, Convert__Reg1_0__Reg1_1__Reg1_2__CondCode1_3, AMFBS_HasFPARMv8, { MCK_FPR32, MCK_FPR32, MCK_FPR32, MCK_CondCode }, },
21234 { 1178 /* fcsel */, AArch64::FCSELDrrr, Convert__Reg1_0__Reg1_1__Reg1_2__CondCode1_3, AMFBS_HasFPARMv8, { MCK_FPR64, MCK_FPR64, MCK_FPR64, MCK_CondCode }, },