reference, declaration → definition definition → references, declarations, derived classes, virtual overrides reference to multiple definitions → definitions unreferenced |
21611 { 1455 /* fmla */, AArch64::FMLAv4i32_indexed, Convert__VectorReg1281_1__Tie0_2_2__VectorReg1281_2__VectorReg1281_3__IndexRange0_31_4, AMFBS_HasNEON, { MCK__DOT_4s, MCK_VectorReg128, MCK_VectorReg128, MCK_VectorReg128, MCK_IndexRange0_3 }, }, 21642 { 1487 /* fmls */, AArch64::FMLSv4i32_indexed, Convert__VectorReg1281_1__Tie0_2_2__VectorReg1281_2__VectorReg1281_3__IndexRange0_31_4, AMFBS_HasNEON, { MCK__DOT_4s, MCK_VectorReg128, MCK_VectorReg128, MCK_VectorReg128, MCK_IndexRange0_3 }, }, 23850 { 3343 /* mla */, AArch64::MLAv4i32_indexed, Convert__VectorReg1281_1__Tie0_2_2__VectorReg1281_2__VectorReg1281_3__IndexRange0_31_4, AMFBS_HasNEON, { MCK__DOT_4s, MCK_VectorReg128, MCK_VectorReg128, MCK_VectorReg128, MCK_IndexRange0_3 }, }, 23867 { 3347 /* mls */, AArch64::MLSv4i32_indexed, Convert__VectorReg1281_1__Tie0_2_2__VectorReg1281_2__VectorReg1281_3__IndexRange0_31_4, AMFBS_HasNEON, { MCK__DOT_4s, MCK_VectorReg128, MCK_VectorReg128, MCK_VectorReg128, MCK_IndexRange0_3 }, }, 24701 { 4463 /* smlal2 */, AArch64::SMLALv4i32_indexed, Convert__VectorReg1281_1__Tie0_2_2__VectorReg1281_2__VectorReg1281_3__IndexRange0_31_4, AMFBS_HasNEON, { MCK__DOT_2d, MCK_VectorReg128, MCK_VectorReg128, MCK_VectorReg128, MCK_IndexRange0_3 }, }, 24721 { 4490 /* smlsl2 */, AArch64::SMLSLv4i32_indexed, Convert__VectorReg1281_1__Tie0_2_2__VectorReg1281_2__VectorReg1281_3__IndexRange0_31_4, AMFBS_HasNEON, { MCK__DOT_2d, MCK_VectorReg128, MCK_VectorReg128, MCK_VectorReg128, MCK_IndexRange0_3 }, }, 24877 { 4632 /* sqdmlal2 */, AArch64::SQDMLALv4i32_indexed, Convert__VectorReg1281_1__Tie0_2_2__VectorReg1281_2__VectorReg1281_3__IndexRange0_31_4, AMFBS_HasNEON, { MCK__DOT_2d, MCK_VectorReg128, MCK_VectorReg128, MCK_VectorReg128, MCK_IndexRange0_3 }, }, 24902 { 4677 /* sqdmlsl2 */, AArch64::SQDMLSLv4i32_indexed, Convert__VectorReg1281_1__Tie0_2_2__VectorReg1281_2__VectorReg1281_3__IndexRange0_31_4, AMFBS_HasNEON, { MCK__DOT_2d, MCK_VectorReg128, MCK_VectorReg128, MCK_VectorReg128, MCK_IndexRange0_3 }, }, 25041 { 4808 /* sqrdmlah */, AArch64::SQRDMLAHv4i32_indexed, Convert__VectorReg1281_1__Tie0_2_2__VectorReg1281_2__VectorReg1281_3__IndexRange0_31_4, AMFBS_HasNEON_HasRDM, { MCK__DOT_4s, MCK_VectorReg128, MCK_VectorReg128, MCK_VectorReg128, MCK_IndexRange0_3 }, }, 25060 { 4817 /* sqrdmlsh */, AArch64::SQRDMLSHv4i32_indexed, Convert__VectorReg1281_1__Tie0_2_2__VectorReg1281_2__VectorReg1281_3__IndexRange0_31_4, AMFBS_HasNEON_HasRDM, { MCK__DOT_4s, MCK_VectorReg128, MCK_VectorReg128, MCK_VectorReg128, MCK_IndexRange0_3 }, }, 26772 { 6417 /* umlal2 */, AArch64::UMLALv4i32_indexed, Convert__VectorReg1281_1__Tie0_2_2__VectorReg1281_2__VectorReg1281_3__IndexRange0_31_4, AMFBS_HasNEON, { MCK__DOT_2d, MCK_VectorReg128, MCK_VectorReg128, MCK_VectorReg128, MCK_IndexRange0_3 }, }, 26792 { 6444 /* umlsl2 */, AArch64::UMLSLv4i32_indexed, Convert__VectorReg1281_1__Tie0_2_2__VectorReg1281_2__VectorReg1281_3__IndexRange0_31_4, AMFBS_HasNEON, { MCK__DOT_2d, MCK_VectorReg128, MCK_VectorReg128, MCK_VectorReg128, MCK_IndexRange0_3 }, },