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reference to multiple definitions → definitions
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References

gen/lib/Target/AArch64/AArch64GenAsmMatcher.inc
24353   { 3876 /* rshrn2 */, AArch64::RSHRNv16i8_shift, Convert__VectorReg1281_1__Tie0_2_2__VectorReg1281_2__Imm1_81_3, AMFBS_HasNEON, { MCK__DOT_16b, MCK_VectorReg128, MCK_VectorReg128, MCK_Imm1_8 }, },
24579   { 4305 /* shrn2 */, AArch64::SHRNv16i8_shift, Convert__VectorReg1281_1__Tie0_2_2__VectorReg1281_2__Imm1_81_3, AMFBS_HasNEON, { MCK__DOT_16b, MCK_VectorReg128, MCK_VectorReg128, MCK_Imm1_8 }, },
25108   { 4858 /* sqrshrn2 */, AArch64::SQRSHRNv16i8_shift, Convert__VectorReg1281_1__Tie0_2_2__VectorReg1281_2__Imm1_81_3, AMFBS_HasNEON, { MCK__DOT_16b, MCK_VectorReg128, MCK_VectorReg128, MCK_Imm1_8 }, },
25123   { 4894 /* sqrshrun2 */, AArch64::SQRSHRUNv16i8_shift, Convert__VectorReg1281_1__Tie0_2_2__VectorReg1281_2__Imm1_81_3, AMFBS_HasNEON, { MCK__DOT_16b, MCK_VectorReg128, MCK_VectorReg128, MCK_Imm1_8 }, },
25187   { 4951 /* sqshrn2 */, AArch64::SQSHRNv16i8_shift, Convert__VectorReg1281_1__Tie0_2_2__VectorReg1281_2__Imm1_81_3, AMFBS_HasNEON, { MCK__DOT_16b, MCK_VectorReg128, MCK_VectorReg128, MCK_Imm1_8 }, },
25202   { 4983 /* sqshrun2 */, AArch64::SQSHRUNv16i8_shift, Convert__VectorReg1281_1__Tie0_2_2__VectorReg1281_2__Imm1_81_3, AMFBS_HasNEON, { MCK__DOT_16b, MCK_VectorReg128, MCK_VectorReg128, MCK_Imm1_8 }, },
25283   { 5088 /* sri */, AArch64::SRIv16i8_shift, Convert__VectorReg1281_1__Tie0_2_2__VectorReg1281_2__Imm1_81_3, AMFBS_HasNEON, { MCK__DOT_16b, MCK_VectorReg128, MCK_VectorReg128, MCK_Imm1_8 }, },
25323   { 5111 /* srsra */, AArch64::SRSRAv16i8_shift, Convert__VectorReg1281_1__Tie0_2_2__VectorReg1281_2__Imm1_81_3, AMFBS_HasNEON, { MCK__DOT_16b, MCK_VectorReg128, MCK_VectorReg128, MCK_Imm1_8 }, },
25364   { 5159 /* ssra */, AArch64::SSRAv16i8_shift, Convert__VectorReg1281_1__Tie0_2_2__VectorReg1281_2__Imm1_81_3, AMFBS_HasNEON, { MCK__DOT_16b, MCK_VectorReg128, MCK_VectorReg128, MCK_Imm1_8 }, },
26982   { 6616 /* uqrshrn2 */, AArch64::UQRSHRNv16i8_shift, Convert__VectorReg1281_1__Tie0_2_2__VectorReg1281_2__Imm1_81_3, AMFBS_HasNEON, { MCK__DOT_16b, MCK_VectorReg128, MCK_VectorReg128, MCK_Imm1_8 }, },
27031   { 6663 /* uqshrn2 */, AArch64::UQSHRNv16i8_shift, Convert__VectorReg1281_1__Tie0_2_2__VectorReg1281_2__Imm1_81_3, AMFBS_HasNEON, { MCK__DOT_16b, MCK_VectorReg128, MCK_VectorReg128, MCK_Imm1_8 }, },
27131   { 6768 /* ursra */, AArch64::URSRAv16i8_shift, Convert__VectorReg1281_1__Tie0_2_2__VectorReg1281_2__Imm1_81_3, AMFBS_HasNEON, { MCK__DOT_16b, MCK_VectorReg128, MCK_VectorReg128, MCK_Imm1_8 }, },
27186   { 6818 /* usra */, AArch64::USRAv16i8_shift, Convert__VectorReg1281_1__Tie0_2_2__VectorReg1281_2__Imm1_81_3, AMFBS_HasNEON, { MCK__DOT_16b, MCK_VectorReg128, MCK_VectorReg128, MCK_Imm1_8 }, },