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reference to multiple definitions → definitions
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References

gen/lib/Target/AArch64/AArch64GenAsmMatcher.inc
24355   { 3876 /* rshrn2 */, AArch64::RSHRNv8i16_shift, Convert__VectorReg1281_1__Tie0_2_2__VectorReg1281_2__Imm1_161_3, AMFBS_HasNEON, { MCK__DOT_8h, MCK_VectorReg128, MCK_VectorReg128, MCK_Imm1_16 }, },
24581   { 4305 /* shrn2 */, AArch64::SHRNv8i16_shift, Convert__VectorReg1281_1__Tie0_2_2__VectorReg1281_2__Imm1_161_3, AMFBS_HasNEON, { MCK__DOT_8h, MCK_VectorReg128, MCK_VectorReg128, MCK_Imm1_16 }, },
25110   { 4858 /* sqrshrn2 */, AArch64::SQRSHRNv8i16_shift, Convert__VectorReg1281_1__Tie0_2_2__VectorReg1281_2__Imm1_161_3, AMFBS_HasNEON, { MCK__DOT_8h, MCK_VectorReg128, MCK_VectorReg128, MCK_Imm1_16 }, },
25125   { 4894 /* sqrshrun2 */, AArch64::SQRSHRUNv8i16_shift, Convert__VectorReg1281_1__Tie0_2_2__VectorReg1281_2__Imm1_161_3, AMFBS_HasNEON, { MCK__DOT_8h, MCK_VectorReg128, MCK_VectorReg128, MCK_Imm1_16 }, },
25189   { 4951 /* sqshrn2 */, AArch64::SQSHRNv8i16_shift, Convert__VectorReg1281_1__Tie0_2_2__VectorReg1281_2__Imm1_161_3, AMFBS_HasNEON, { MCK__DOT_8h, MCK_VectorReg128, MCK_VectorReg128, MCK_Imm1_16 }, },
25204   { 4983 /* sqshrun2 */, AArch64::SQSHRUNv8i16_shift, Convert__VectorReg1281_1__Tie0_2_2__VectorReg1281_2__Imm1_161_3, AMFBS_HasNEON, { MCK__DOT_8h, MCK_VectorReg128, MCK_VectorReg128, MCK_Imm1_16 }, },
25289   { 5088 /* sri */, AArch64::SRIv8i16_shift, Convert__VectorReg1281_1__Tie0_2_2__VectorReg1281_2__Imm1_161_3, AMFBS_HasNEON, { MCK__DOT_8h, MCK_VectorReg128, MCK_VectorReg128, MCK_Imm1_16 }, },
25329   { 5111 /* srsra */, AArch64::SRSRAv8i16_shift, Convert__VectorReg1281_1__Tie0_2_2__VectorReg1281_2__Imm1_161_3, AMFBS_HasNEON, { MCK__DOT_8h, MCK_VectorReg128, MCK_VectorReg128, MCK_Imm1_16 }, },
25370   { 5159 /* ssra */, AArch64::SSRAv8i16_shift, Convert__VectorReg1281_1__Tie0_2_2__VectorReg1281_2__Imm1_161_3, AMFBS_HasNEON, { MCK__DOT_8h, MCK_VectorReg128, MCK_VectorReg128, MCK_Imm1_16 }, },
26984   { 6616 /* uqrshrn2 */, AArch64::UQRSHRNv8i16_shift, Convert__VectorReg1281_1__Tie0_2_2__VectorReg1281_2__Imm1_161_3, AMFBS_HasNEON, { MCK__DOT_8h, MCK_VectorReg128, MCK_VectorReg128, MCK_Imm1_16 }, },
27033   { 6663 /* uqshrn2 */, AArch64::UQSHRNv8i16_shift, Convert__VectorReg1281_1__Tie0_2_2__VectorReg1281_2__Imm1_161_3, AMFBS_HasNEON, { MCK__DOT_8h, MCK_VectorReg128, MCK_VectorReg128, MCK_Imm1_16 }, },
27137   { 6768 /* ursra */, AArch64::URSRAv8i16_shift, Convert__VectorReg1281_1__Tie0_2_2__VectorReg1281_2__Imm1_161_3, AMFBS_HasNEON, { MCK__DOT_8h, MCK_VectorReg128, MCK_VectorReg128, MCK_Imm1_16 }, },
27192   { 6818 /* usra */, AArch64::USRAv8i16_shift, Convert__VectorReg1281_1__Tie0_2_2__VectorReg1281_2__Imm1_161_3, AMFBS_HasNEON, { MCK__DOT_8h, MCK_VectorReg128, MCK_VectorReg128, MCK_Imm1_16 }, },