reference, declaration → definition definition → references, declarations, derived classes, virtual overrides reference to multiple definitions → definitions unreferenced |
14258 { 1455 /* fmla */, AArch64::FMLAv8i16_indexed, Convert__VectorReg1281_0__Tie0_1_1__VectorReg1281_2__VectorRegLo1_4__IndexRange0_71_6, AMFBS_HasNEON_HasFullFP16, { MCK_VectorReg128, MCK__DOT_8h, MCK_VectorReg128, MCK__DOT_8h, MCK_VectorRegLo, MCK__DOT_h, MCK_IndexRange0_7 }, }, 14289 { 1487 /* fmls */, AArch64::FMLSv8i16_indexed, Convert__VectorReg1281_0__Tie0_1_1__VectorReg1281_2__VectorRegLo1_4__IndexRange0_71_6, AMFBS_HasNEON_HasFullFP16, { MCK_VectorReg128, MCK__DOT_8h, MCK_VectorReg128, MCK__DOT_8h, MCK_VectorRegLo, MCK__DOT_h, MCK_IndexRange0_7 }, }, 16495 { 3343 /* mla */, AArch64::MLAv8i16_indexed, Convert__VectorReg1281_0__Tie0_1_1__VectorReg1281_2__VectorRegLo1_4__IndexRange0_71_6, AMFBS_HasNEON, { MCK_VectorReg128, MCK__DOT_8h, MCK_VectorReg128, MCK__DOT_8h, MCK_VectorRegLo, MCK__DOT_h, MCK_IndexRange0_7 }, }, 16512 { 3347 /* mls */, AArch64::MLSv8i16_indexed, Convert__VectorReg1281_0__Tie0_1_1__VectorReg1281_2__VectorRegLo1_4__IndexRange0_71_6, AMFBS_HasNEON, { MCK_VectorReg128, MCK__DOT_8h, MCK_VectorReg128, MCK__DOT_8h, MCK_VectorRegLo, MCK__DOT_h, MCK_IndexRange0_7 }, }, 17344 { 4463 /* smlal2 */, AArch64::SMLALv8i16_indexed, Convert__VectorReg1281_0__Tie0_1_1__VectorReg1281_2__VectorRegLo1_4__IndexRange0_71_6, AMFBS_HasNEON, { MCK_VectorReg128, MCK__DOT_4s, MCK_VectorReg128, MCK__DOT_8h, MCK_VectorRegLo, MCK__DOT_h, MCK_IndexRange0_7 }, }, 17364 { 4490 /* smlsl2 */, AArch64::SMLSLv8i16_indexed, Convert__VectorReg1281_0__Tie0_1_1__VectorReg1281_2__VectorRegLo1_4__IndexRange0_71_6, AMFBS_HasNEON, { MCK_VectorReg128, MCK__DOT_4s, MCK_VectorReg128, MCK__DOT_8h, MCK_VectorRegLo, MCK__DOT_h, MCK_IndexRange0_7 }, }, 17520 { 4632 /* sqdmlal2 */, AArch64::SQDMLALv8i16_indexed, Convert__VectorReg1281_0__Tie0_1_1__VectorReg1281_2__VectorRegLo1_4__IndexRange0_71_6, AMFBS_HasNEON, { MCK_VectorReg128, MCK__DOT_4s, MCK_VectorReg128, MCK__DOT_8h, MCK_VectorRegLo, MCK__DOT_h, MCK_IndexRange0_7 }, }, 17545 { 4677 /* sqdmlsl2 */, AArch64::SQDMLSLv8i16_indexed, Convert__VectorReg1281_0__Tie0_1_1__VectorReg1281_2__VectorRegLo1_4__IndexRange0_71_6, AMFBS_HasNEON, { MCK_VectorReg128, MCK__DOT_4s, MCK_VectorReg128, MCK__DOT_8h, MCK_VectorRegLo, MCK__DOT_h, MCK_IndexRange0_7 }, }, 17684 { 4808 /* sqrdmlah */, AArch64::SQRDMLAHv8i16_indexed, Convert__VectorReg1281_0__Tie0_1_1__VectorReg1281_2__VectorRegLo1_4__IndexRange0_71_6, AMFBS_HasNEON_HasRDM, { MCK_VectorReg128, MCK__DOT_8h, MCK_VectorReg128, MCK__DOT_8h, MCK_VectorRegLo, MCK__DOT_h, MCK_IndexRange0_7 }, }, 17703 { 4817 /* sqrdmlsh */, AArch64::SQRDMLSHv8i16_indexed, Convert__VectorReg1281_0__Tie0_1_1__VectorReg1281_2__VectorRegLo1_4__IndexRange0_71_6, AMFBS_HasNEON_HasRDM, { MCK_VectorReg128, MCK__DOT_8h, MCK_VectorReg128, MCK__DOT_8h, MCK_VectorRegLo, MCK__DOT_h, MCK_IndexRange0_7 }, }, 19415 { 6417 /* umlal2 */, AArch64::UMLALv8i16_indexed, Convert__VectorReg1281_0__Tie0_1_1__VectorReg1281_2__VectorRegLo1_4__IndexRange0_71_6, AMFBS_HasNEON, { MCK_VectorReg128, MCK__DOT_4s, MCK_VectorReg128, MCK__DOT_8h, MCK_VectorRegLo, MCK__DOT_h, MCK_IndexRange0_7 }, }, 19435 { 6444 /* umlsl2 */, AArch64::UMLSLv8i16_indexed, Convert__VectorReg1281_0__Tie0_1_1__VectorReg1281_2__VectorRegLo1_4__IndexRange0_71_6, AMFBS_HasNEON, { MCK_VectorReg128, MCK__DOT_4s, MCK_VectorReg128, MCK__DOT_8h, MCK_VectorRegLo, MCK__DOT_h, MCK_IndexRange0_7 }, },