reference, declarationdefinition
definition → references, declarations, derived classes, virtual overrides
reference to multiple definitions → definitions
unreferenced

References

gen/lib/Target/AArch64/AArch64GenAsmMatcher.inc
14257   { 1455 /* fmla */, AArch64::FMLAv4i32_indexed, Convert__VectorReg1281_0__Tie0_1_1__VectorReg1281_2__VectorReg1281_4__IndexRange0_31_6, AMFBS_HasNEON, { MCK_VectorReg128, MCK__DOT_4s, MCK_VectorReg128, MCK__DOT_4s, MCK_VectorReg128, MCK__DOT_s, MCK_IndexRange0_3 }, },
14288   { 1487 /* fmls */, AArch64::FMLSv4i32_indexed, Convert__VectorReg1281_0__Tie0_1_1__VectorReg1281_2__VectorReg1281_4__IndexRange0_31_6, AMFBS_HasNEON, { MCK_VectorReg128, MCK__DOT_4s, MCK_VectorReg128, MCK__DOT_4s, MCK_VectorReg128, MCK__DOT_s, MCK_IndexRange0_3 }, },
16494   { 3343 /* mla */, AArch64::MLAv4i32_indexed, Convert__VectorReg1281_0__Tie0_1_1__VectorReg1281_2__VectorReg1281_4__IndexRange0_31_6, AMFBS_HasNEON, { MCK_VectorReg128, MCK__DOT_4s, MCK_VectorReg128, MCK__DOT_4s, MCK_VectorReg128, MCK__DOT_s, MCK_IndexRange0_3 }, },
16511   { 3347 /* mls */, AArch64::MLSv4i32_indexed, Convert__VectorReg1281_0__Tie0_1_1__VectorReg1281_2__VectorReg1281_4__IndexRange0_31_6, AMFBS_HasNEON, { MCK_VectorReg128, MCK__DOT_4s, MCK_VectorReg128, MCK__DOT_4s, MCK_VectorReg128, MCK__DOT_s, MCK_IndexRange0_3 }, },
17168   { 4127 /* sdot */, AArch64::SDOTlanev16i8, Convert__VectorReg1281_0__Tie0_1_1__VectorReg1281_2__VectorReg1281_4__IndexRange0_31_6, AMFBS_HasDotProd, { MCK_VectorReg128, MCK__DOT_4s, MCK_VectorReg128, MCK__DOT_16b, MCK_VectorReg128, MCK__DOT_4b, MCK_IndexRange0_3 }, },
17259   { 4367 /* sm3tt1a */, AArch64::SM3TT1A, Convert__VectorReg1281_0__Tie0_1_1__VectorReg1281_2__VectorReg1281_4__IndexRange0_31_6, AMFBS_HasSM4, { MCK_VectorReg128, MCK__DOT_4s, MCK_VectorReg128, MCK__DOT_4s, MCK_VectorReg128, MCK__DOT_s, MCK_IndexRange0_3 }, },
17260   { 4375 /* sm3tt1b */, AArch64::SM3TT1B, Convert__VectorReg1281_0__Tie0_1_1__VectorReg1281_2__VectorReg1281_4__IndexRange0_31_6, AMFBS_HasSM4, { MCK_VectorReg128, MCK__DOT_4s, MCK_VectorReg128, MCK__DOT_4s, MCK_VectorReg128, MCK__DOT_s, MCK_IndexRange0_3 }, },
17261   { 4383 /* sm3tt2a */, AArch64::SM3TT2A, Convert__VectorReg1281_0__Tie0_1_1__VectorReg1281_2__VectorReg1281_4__IndexRange0_31_6, AMFBS_HasSM4, { MCK_VectorReg128, MCK__DOT_4s, MCK_VectorReg128, MCK__DOT_4s, MCK_VectorReg128, MCK__DOT_s, MCK_IndexRange0_3 }, },
17262   { 4391 /* sm3tt2b */, AArch64::SM3TT2B, Convert__VectorReg1281_0__Tie0_1_1__VectorReg1281_2__VectorReg1281_4__IndexRange0_31_6, AMFBS_HasSM4, { MCK_VectorReg128, MCK__DOT_4s, MCK_VectorReg128, MCK__DOT_4s, MCK_VectorReg128, MCK__DOT_s, MCK_IndexRange0_3 }, },
17343   { 4463 /* smlal2 */, AArch64::SMLALv4i32_indexed, Convert__VectorReg1281_0__Tie0_1_1__VectorReg1281_2__VectorReg1281_4__IndexRange0_31_6, AMFBS_HasNEON, { MCK_VectorReg128, MCK__DOT_2d, MCK_VectorReg128, MCK__DOT_4s, MCK_VectorReg128, MCK__DOT_s, MCK_IndexRange0_3 }, },
17363   { 4490 /* smlsl2 */, AArch64::SMLSLv4i32_indexed, Convert__VectorReg1281_0__Tie0_1_1__VectorReg1281_2__VectorReg1281_4__IndexRange0_31_6, AMFBS_HasNEON, { MCK_VectorReg128, MCK__DOT_2d, MCK_VectorReg128, MCK__DOT_4s, MCK_VectorReg128, MCK__DOT_s, MCK_IndexRange0_3 }, },
17519   { 4632 /* sqdmlal2 */, AArch64::SQDMLALv4i32_indexed, Convert__VectorReg1281_0__Tie0_1_1__VectorReg1281_2__VectorReg1281_4__IndexRange0_31_6, AMFBS_HasNEON, { MCK_VectorReg128, MCK__DOT_2d, MCK_VectorReg128, MCK__DOT_4s, MCK_VectorReg128, MCK__DOT_s, MCK_IndexRange0_3 }, },
17544   { 4677 /* sqdmlsl2 */, AArch64::SQDMLSLv4i32_indexed, Convert__VectorReg1281_0__Tie0_1_1__VectorReg1281_2__VectorReg1281_4__IndexRange0_31_6, AMFBS_HasNEON, { MCK_VectorReg128, MCK__DOT_2d, MCK_VectorReg128, MCK__DOT_4s, MCK_VectorReg128, MCK__DOT_s, MCK_IndexRange0_3 }, },
17683   { 4808 /* sqrdmlah */, AArch64::SQRDMLAHv4i32_indexed, Convert__VectorReg1281_0__Tie0_1_1__VectorReg1281_2__VectorReg1281_4__IndexRange0_31_6, AMFBS_HasNEON_HasRDM, { MCK_VectorReg128, MCK__DOT_4s, MCK_VectorReg128, MCK__DOT_4s, MCK_VectorReg128, MCK__DOT_s, MCK_IndexRange0_3 }, },
17702   { 4817 /* sqrdmlsh */, AArch64::SQRDMLSHv4i32_indexed, Convert__VectorReg1281_0__Tie0_1_1__VectorReg1281_2__VectorReg1281_4__IndexRange0_31_6, AMFBS_HasNEON_HasRDM, { MCK_VectorReg128, MCK__DOT_4s, MCK_VectorReg128, MCK__DOT_4s, MCK_VectorReg128, MCK__DOT_s, MCK_IndexRange0_3 }, },
19313   { 6346 /* udot */, AArch64::UDOTlanev16i8, Convert__VectorReg1281_0__Tie0_1_1__VectorReg1281_2__VectorReg1281_4__IndexRange0_31_6, AMFBS_HasDotProd, { MCK_VectorReg128, MCK__DOT_4s, MCK_VectorReg128, MCK__DOT_16b, MCK_VectorReg128, MCK__DOT_4b, MCK_IndexRange0_3 }, },
19414   { 6417 /* umlal2 */, AArch64::UMLALv4i32_indexed, Convert__VectorReg1281_0__Tie0_1_1__VectorReg1281_2__VectorReg1281_4__IndexRange0_31_6, AMFBS_HasNEON, { MCK_VectorReg128, MCK__DOT_2d, MCK_VectorReg128, MCK__DOT_4s, MCK_VectorReg128, MCK__DOT_s, MCK_IndexRange0_3 }, },
19434   { 6444 /* umlsl2 */, AArch64::UMLSLv4i32_indexed, Convert__VectorReg1281_0__Tie0_1_1__VectorReg1281_2__VectorReg1281_4__IndexRange0_31_6, AMFBS_HasNEON, { MCK_VectorReg128, MCK__DOT_2d, MCK_VectorReg128, MCK__DOT_4s, MCK_VectorReg128, MCK__DOT_s, MCK_IndexRange0_3 }, },