reference, declarationdefinition
definition → references, declarations, derived classes, virtual overrides
reference to multiple definitions → definitions
unreferenced

References

gen/lib/Target/AArch64/AArch64GenAsmMatcher.inc
14269   { 1473 /* fmlalb */, AArch64::FMLALB_ZZZ_SHH, Convert__SVEVectorSReg1_0__Tie0_1_1__SVEVectorHReg1_1__SVEVectorHReg1_2, AMFBS_HasSVE2, { MCK_SVEVectorSReg, MCK_SVEVectorHReg, MCK_SVEVectorHReg }, },
14271   { 1480 /* fmlalt */, AArch64::FMLALT_ZZZ_SHH, Convert__SVEVectorSReg1_0__Tie0_1_1__SVEVectorHReg1_1__SVEVectorHReg1_2, AMFBS_HasSVE2, { MCK_SVEVectorSReg, MCK_SVEVectorHReg, MCK_SVEVectorHReg }, },
14300   { 1505 /* fmlslb */, AArch64::FMLSLB_ZZZ_SHH, Convert__SVEVectorSReg1_0__Tie0_1_1__SVEVectorHReg1_1__SVEVectorHReg1_2, AMFBS_HasSVE2, { MCK_SVEVectorSReg, MCK_SVEVectorHReg, MCK_SVEVectorHReg }, },
14302   { 1512 /* fmlslt */, AArch64::FMLSLT_ZZZ_SHH, Convert__SVEVectorSReg1_0__Tie0_1_1__SVEVectorHReg1_1__SVEVectorHReg1_2, AMFBS_HasSVE2, { MCK_SVEVectorSReg, MCK_SVEVectorHReg, MCK_SVEVectorHReg }, },
17033   { 3946 /* sabalb */, AArch64::SABALB_ZZZ_S, Convert__SVEVectorSReg1_0__Tie0_1_1__SVEVectorHReg1_1__SVEVectorHReg1_2, AMFBS_HasSVE2, { MCK_SVEVectorSReg, MCK_SVEVectorHReg, MCK_SVEVectorHReg }, },
17036   { 3953 /* sabalt */, AArch64::SABALT_ZZZ_S, Convert__SVEVectorSReg1_0__Tie0_1_1__SVEVectorHReg1_1__SVEVectorHReg1_2, AMFBS_HasSVE2, { MCK_SVEVectorSReg, MCK_SVEVectorHReg, MCK_SVEVectorHReg }, },
17346   { 4470 /* smlalb */, AArch64::SMLALB_ZZZ_S, Convert__SVEVectorSReg1_0__Tie0_1_1__SVEVectorHReg1_1__SVEVectorHReg1_2, AMFBS_HasSVE2, { MCK_SVEVectorSReg, MCK_SVEVectorHReg, MCK_SVEVectorHReg }, },
17351   { 4477 /* smlalt */, AArch64::SMLALT_ZZZ_S, Convert__SVEVectorSReg1_0__Tie0_1_1__SVEVectorHReg1_1__SVEVectorHReg1_2, AMFBS_HasSVE2, { MCK_SVEVectorSReg, MCK_SVEVectorHReg, MCK_SVEVectorHReg }, },
17366   { 4497 /* smlslb */, AArch64::SMLSLB_ZZZ_S, Convert__SVEVectorSReg1_0__Tie0_1_1__SVEVectorHReg1_1__SVEVectorHReg1_2, AMFBS_HasSVE2, { MCK_SVEVectorSReg, MCK_SVEVectorHReg, MCK_SVEVectorHReg }, },
17371   { 4504 /* smlslt */, AArch64::SMLSLT_ZZZ_S, Convert__SVEVectorSReg1_0__Tie0_1_1__SVEVectorHReg1_1__SVEVectorHReg1_2, AMFBS_HasSVE2, { MCK_SVEVectorSReg, MCK_SVEVectorHReg, MCK_SVEVectorHReg }, },
17522   { 4641 /* sqdmlalb */, AArch64::SQDMLALB_ZZZ_S, Convert__SVEVectorSReg1_0__Tie0_1_1__SVEVectorHReg1_1__SVEVectorHReg1_2, AMFBS_HasSVE2, { MCK_SVEVectorSReg, MCK_SVEVectorHReg, MCK_SVEVectorHReg }, },
17527   { 4650 /* sqdmlalbt */, AArch64::SQDMLALBT_ZZZ_S, Convert__SVEVectorSReg1_0__Tie0_1_1__SVEVectorHReg1_1__SVEVectorHReg1_2, AMFBS_HasSVE2, { MCK_SVEVectorSReg, MCK_SVEVectorHReg, MCK_SVEVectorHReg }, },
17530   { 4660 /* sqdmlalt */, AArch64::SQDMLALT_ZZZ_S, Convert__SVEVectorSReg1_0__Tie0_1_1__SVEVectorHReg1_1__SVEVectorHReg1_2, AMFBS_HasSVE2, { MCK_SVEVectorSReg, MCK_SVEVectorHReg, MCK_SVEVectorHReg }, },
17547   { 4686 /* sqdmlslb */, AArch64::SQDMLSLB_ZZZ_S, Convert__SVEVectorSReg1_0__Tie0_1_1__SVEVectorHReg1_1__SVEVectorHReg1_2, AMFBS_HasSVE2, { MCK_SVEVectorSReg, MCK_SVEVectorHReg, MCK_SVEVectorHReg }, },
17552   { 4695 /* sqdmlslbt */, AArch64::SQDMLSLBT_ZZZ_S, Convert__SVEVectorSReg1_0__Tie0_1_1__SVEVectorHReg1_1__SVEVectorHReg1_2, AMFBS_HasSVE2, { MCK_SVEVectorSReg, MCK_SVEVectorHReg, MCK_SVEVectorHReg }, },
17555   { 4705 /* sqdmlslt */, AArch64::SQDMLSLT_ZZZ_S, Convert__SVEVectorSReg1_0__Tie0_1_1__SVEVectorHReg1_1__SVEVectorHReg1_2, AMFBS_HasSVE2, { MCK_SVEVectorSReg, MCK_SVEVectorHReg, MCK_SVEVectorHReg }, },
19188   { 6193 /* uabalb */, AArch64::UABALB_ZZZ_S, Convert__SVEVectorSReg1_0__Tie0_1_1__SVEVectorHReg1_1__SVEVectorHReg1_2, AMFBS_HasSVE2, { MCK_SVEVectorSReg, MCK_SVEVectorHReg, MCK_SVEVectorHReg }, },
19191   { 6200 /* uabalt */, AArch64::UABALT_ZZZ_S, Convert__SVEVectorSReg1_0__Tie0_1_1__SVEVectorHReg1_1__SVEVectorHReg1_2, AMFBS_HasSVE2, { MCK_SVEVectorSReg, MCK_SVEVectorHReg, MCK_SVEVectorHReg }, },
19417   { 6424 /* umlalb */, AArch64::UMLALB_ZZZ_S, Convert__SVEVectorSReg1_0__Tie0_1_1__SVEVectorHReg1_1__SVEVectorHReg1_2, AMFBS_HasSVE2, { MCK_SVEVectorSReg, MCK_SVEVectorHReg, MCK_SVEVectorHReg }, },
19422   { 6431 /* umlalt */, AArch64::UMLALT_ZZZ_S, Convert__SVEVectorSReg1_0__Tie0_1_1__SVEVectorHReg1_1__SVEVectorHReg1_2, AMFBS_HasSVE2, { MCK_SVEVectorSReg, MCK_SVEVectorHReg, MCK_SVEVectorHReg }, },
19437   { 6451 /* umlslb */, AArch64::UMLSLB_ZZZ_S, Convert__SVEVectorSReg1_0__Tie0_1_1__SVEVectorHReg1_1__SVEVectorHReg1_2, AMFBS_HasSVE2, { MCK_SVEVectorSReg, MCK_SVEVectorHReg, MCK_SVEVectorHReg }, },
19442   { 6458 /* umlslt */, AArch64::UMLSLT_ZZZ_S, Convert__SVEVectorSReg1_0__Tie0_1_1__SVEVectorHReg1_1__SVEVectorHReg1_2, AMFBS_HasSVE2, { MCK_SVEVectorSReg, MCK_SVEVectorHReg, MCK_SVEVectorHReg }, },
21627   { 1473 /* fmlalb */, AArch64::FMLALB_ZZZ_SHH, Convert__SVEVectorSReg1_0__Tie0_1_1__SVEVectorHReg1_1__SVEVectorHReg1_2, AMFBS_HasSVE2, { MCK_SVEVectorSReg, MCK_SVEVectorHReg, MCK_SVEVectorHReg }, },
21629   { 1480 /* fmlalt */, AArch64::FMLALT_ZZZ_SHH, Convert__SVEVectorSReg1_0__Tie0_1_1__SVEVectorHReg1_1__SVEVectorHReg1_2, AMFBS_HasSVE2, { MCK_SVEVectorSReg, MCK_SVEVectorHReg, MCK_SVEVectorHReg }, },
21658   { 1505 /* fmlslb */, AArch64::FMLSLB_ZZZ_SHH, Convert__SVEVectorSReg1_0__Tie0_1_1__SVEVectorHReg1_1__SVEVectorHReg1_2, AMFBS_HasSVE2, { MCK_SVEVectorSReg, MCK_SVEVectorHReg, MCK_SVEVectorHReg }, },
21660   { 1512 /* fmlslt */, AArch64::FMLSLT_ZZZ_SHH, Convert__SVEVectorSReg1_0__Tie0_1_1__SVEVectorHReg1_1__SVEVectorHReg1_2, AMFBS_HasSVE2, { MCK_SVEVectorSReg, MCK_SVEVectorHReg, MCK_SVEVectorHReg }, },
24391   { 3946 /* sabalb */, AArch64::SABALB_ZZZ_S, Convert__SVEVectorSReg1_0__Tie0_1_1__SVEVectorHReg1_1__SVEVectorHReg1_2, AMFBS_HasSVE2, { MCK_SVEVectorSReg, MCK_SVEVectorHReg, MCK_SVEVectorHReg }, },
24394   { 3953 /* sabalt */, AArch64::SABALT_ZZZ_S, Convert__SVEVectorSReg1_0__Tie0_1_1__SVEVectorHReg1_1__SVEVectorHReg1_2, AMFBS_HasSVE2, { MCK_SVEVectorSReg, MCK_SVEVectorHReg, MCK_SVEVectorHReg }, },
24704   { 4470 /* smlalb */, AArch64::SMLALB_ZZZ_S, Convert__SVEVectorSReg1_0__Tie0_1_1__SVEVectorHReg1_1__SVEVectorHReg1_2, AMFBS_HasSVE2, { MCK_SVEVectorSReg, MCK_SVEVectorHReg, MCK_SVEVectorHReg }, },
24709   { 4477 /* smlalt */, AArch64::SMLALT_ZZZ_S, Convert__SVEVectorSReg1_0__Tie0_1_1__SVEVectorHReg1_1__SVEVectorHReg1_2, AMFBS_HasSVE2, { MCK_SVEVectorSReg, MCK_SVEVectorHReg, MCK_SVEVectorHReg }, },
24724   { 4497 /* smlslb */, AArch64::SMLSLB_ZZZ_S, Convert__SVEVectorSReg1_0__Tie0_1_1__SVEVectorHReg1_1__SVEVectorHReg1_2, AMFBS_HasSVE2, { MCK_SVEVectorSReg, MCK_SVEVectorHReg, MCK_SVEVectorHReg }, },
24729   { 4504 /* smlslt */, AArch64::SMLSLT_ZZZ_S, Convert__SVEVectorSReg1_0__Tie0_1_1__SVEVectorHReg1_1__SVEVectorHReg1_2, AMFBS_HasSVE2, { MCK_SVEVectorSReg, MCK_SVEVectorHReg, MCK_SVEVectorHReg }, },
24880   { 4641 /* sqdmlalb */, AArch64::SQDMLALB_ZZZ_S, Convert__SVEVectorSReg1_0__Tie0_1_1__SVEVectorHReg1_1__SVEVectorHReg1_2, AMFBS_HasSVE2, { MCK_SVEVectorSReg, MCK_SVEVectorHReg, MCK_SVEVectorHReg }, },
24885   { 4650 /* sqdmlalbt */, AArch64::SQDMLALBT_ZZZ_S, Convert__SVEVectorSReg1_0__Tie0_1_1__SVEVectorHReg1_1__SVEVectorHReg1_2, AMFBS_HasSVE2, { MCK_SVEVectorSReg, MCK_SVEVectorHReg, MCK_SVEVectorHReg }, },
24888   { 4660 /* sqdmlalt */, AArch64::SQDMLALT_ZZZ_S, Convert__SVEVectorSReg1_0__Tie0_1_1__SVEVectorHReg1_1__SVEVectorHReg1_2, AMFBS_HasSVE2, { MCK_SVEVectorSReg, MCK_SVEVectorHReg, MCK_SVEVectorHReg }, },
24905   { 4686 /* sqdmlslb */, AArch64::SQDMLSLB_ZZZ_S, Convert__SVEVectorSReg1_0__Tie0_1_1__SVEVectorHReg1_1__SVEVectorHReg1_2, AMFBS_HasSVE2, { MCK_SVEVectorSReg, MCK_SVEVectorHReg, MCK_SVEVectorHReg }, },
24910   { 4695 /* sqdmlslbt */, AArch64::SQDMLSLBT_ZZZ_S, Convert__SVEVectorSReg1_0__Tie0_1_1__SVEVectorHReg1_1__SVEVectorHReg1_2, AMFBS_HasSVE2, { MCK_SVEVectorSReg, MCK_SVEVectorHReg, MCK_SVEVectorHReg }, },
24913   { 4705 /* sqdmlslt */, AArch64::SQDMLSLT_ZZZ_S, Convert__SVEVectorSReg1_0__Tie0_1_1__SVEVectorHReg1_1__SVEVectorHReg1_2, AMFBS_HasSVE2, { MCK_SVEVectorSReg, MCK_SVEVectorHReg, MCK_SVEVectorHReg }, },
26546   { 6193 /* uabalb */, AArch64::UABALB_ZZZ_S, Convert__SVEVectorSReg1_0__Tie0_1_1__SVEVectorHReg1_1__SVEVectorHReg1_2, AMFBS_HasSVE2, { MCK_SVEVectorSReg, MCK_SVEVectorHReg, MCK_SVEVectorHReg }, },
26549   { 6200 /* uabalt */, AArch64::UABALT_ZZZ_S, Convert__SVEVectorSReg1_0__Tie0_1_1__SVEVectorHReg1_1__SVEVectorHReg1_2, AMFBS_HasSVE2, { MCK_SVEVectorSReg, MCK_SVEVectorHReg, MCK_SVEVectorHReg }, },
26775   { 6424 /* umlalb */, AArch64::UMLALB_ZZZ_S, Convert__SVEVectorSReg1_0__Tie0_1_1__SVEVectorHReg1_1__SVEVectorHReg1_2, AMFBS_HasSVE2, { MCK_SVEVectorSReg, MCK_SVEVectorHReg, MCK_SVEVectorHReg }, },
26780   { 6431 /* umlalt */, AArch64::UMLALT_ZZZ_S, Convert__SVEVectorSReg1_0__Tie0_1_1__SVEVectorHReg1_1__SVEVectorHReg1_2, AMFBS_HasSVE2, { MCK_SVEVectorSReg, MCK_SVEVectorHReg, MCK_SVEVectorHReg }, },
26795   { 6451 /* umlslb */, AArch64::UMLSLB_ZZZ_S, Convert__SVEVectorSReg1_0__Tie0_1_1__SVEVectorHReg1_1__SVEVectorHReg1_2, AMFBS_HasSVE2, { MCK_SVEVectorSReg, MCK_SVEVectorHReg, MCK_SVEVectorHReg }, },
26800   { 6458 /* umlslt */, AArch64::UMLSLT_ZZZ_S, Convert__SVEVectorSReg1_0__Tie0_1_1__SVEVectorHReg1_1__SVEVectorHReg1_2, AMFBS_HasSVE2, { MCK_SVEVectorSReg, MCK_SVEVectorHReg, MCK_SVEVectorHReg }, },