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reference, declaration → definition
definition → references, declarations, derived classes, virtual overrides
reference to multiple definitions → definitions
unreferenced
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References
gen/lib/Target/AArch64/AArch64GenAsmMatcher.inc12693 { 0 /* abs */, AArch64::ABS_ZPmZ_S, Convert__SVEVectorSReg1_0__Tie0_1_1__SVEPredicate3bAnyReg1_1__SVEVectorSReg1_4, AMFBS_HasSVE, { MCK_SVEVectorSReg, MCK_SVEPredicate3bAnyReg, MCK__47_, MCK_m, MCK_SVEVectorSReg }, },
13069 { 603 /* cls */, AArch64::CLS_ZPmZ_S, Convert__SVEVectorSReg1_0__Tie0_1_1__SVEPredicate3bAnyReg1_1__SVEVectorSReg1_4, AMFBS_HasSVE, { MCK_SVEVectorSReg, MCK_SVEPredicate3bAnyReg, MCK__47_, MCK_m, MCK_SVEVectorSReg }, },
13081 { 607 /* clz */, AArch64::CLZ_ZPmZ_S, Convert__SVEVectorSReg1_0__Tie0_1_1__SVEPredicate3bAnyReg1_1__SVEVectorSReg1_4, AMFBS_HasSVE, { MCK_SVEVectorSReg, MCK_SVEPredicate3bAnyReg, MCK__47_, MCK_m, MCK_SVEVectorSReg }, },
13350 { 745 /* cnot */, AArch64::CNOT_ZPmZ_S, Convert__SVEVectorSReg1_0__Tie0_1_1__SVEPredicate3bAnyReg1_1__SVEVectorSReg1_4, AMFBS_HasSVE, { MCK_SVEVectorSReg, MCK_SVEPredicate3bAnyReg, MCK__47_, MCK_m, MCK_SVEVectorSReg }, },
13356 { 750 /* cnt */, AArch64::CNT_ZPmZ_S, Convert__SVEVectorSReg1_0__Tie0_1_1__SVEPredicate3bAnyReg1_1__SVEVectorSReg1_4, AMFBS_HasSVE, { MCK_SVEVectorSReg, MCK_SVEPredicate3bAnyReg, MCK__47_, MCK_m, MCK_SVEVectorSReg }, },
13572 { 1043 /* fabs */, AArch64::FABS_ZPmZ_S, Convert__SVEVectorSReg1_0__Tie0_1_1__SVEPredicate3bAnyReg1_1__SVEVectorSReg1_4, AMFBS_HasSVE, { MCK_SVEVectorSReg, MCK_SVEPredicate3bAnyReg, MCK__47_, MCK_m, MCK_SVEVectorSReg }, },
14048 { 1314 /* fcvtzs */, AArch64::FCVTZS_ZPmZ_StoS, Convert__SVEVectorSReg1_0__Tie0_1_1__SVEPredicate3bAnyReg1_1__SVEVectorSReg1_4, AMFBS_HasSVE, { MCK_SVEVectorSReg, MCK_SVEPredicate3bAnyReg, MCK__47_, MCK_m, MCK_SVEVectorSReg }, },
14083 { 1321 /* fcvtzu */, AArch64::FCVTZU_ZPmZ_StoS, Convert__SVEVectorSReg1_0__Tie0_1_1__SVEPredicate3bAnyReg1_1__SVEVectorSReg1_4, AMFBS_HasSVE, { MCK_SVEVectorSReg, MCK_SVEPredicate3bAnyReg, MCK__47_, MCK_m, MCK_SVEVectorSReg }, },
14110 { 1358 /* flogb */, AArch64::FLOGB_ZPmZ_S, Convert__SVEVectorSReg1_0__Tie0_1_1__SVEPredicate3bAnyReg1_1__SVEVectorSReg1_4, AMFBS_HasSVE2, { MCK_SVEVectorSReg, MCK_SVEPredicate3bAnyReg, MCK__47_, MCK_m, MCK_SVEVectorSReg }, },
14402 { 1546 /* fneg */, AArch64::FNEG_ZPmZ_S, Convert__SVEVectorSReg1_0__Tie0_1_1__SVEPredicate3bAnyReg1_1__SVEVectorSReg1_4, AMFBS_HasSVE, { MCK_SVEVectorSReg, MCK_SVEPredicate3bAnyReg, MCK__47_, MCK_m, MCK_SVEVectorSReg }, },
14451 { 1609 /* frecpx */, AArch64::FRECPX_ZPmZ_S, Convert__SVEVectorSReg1_0__Tie0_1_1__SVEPredicate3bAnyReg1_1__SVEVectorSReg1_4, AMFBS_HasSVE, { MCK_SVEVectorSReg, MCK_SVEPredicate3bAnyReg, MCK__47_, MCK_m, MCK_SVEVectorSReg }, },
14482 { 1652 /* frinta */, AArch64::FRINTA_ZPmZ_S, Convert__SVEVectorSReg1_0__Tie0_1_1__SVEPredicate3bAnyReg1_1__SVEVectorSReg1_4, AMFBS_HasSVE, { MCK_SVEVectorSReg, MCK_SVEPredicate3bAnyReg, MCK__47_, MCK_m, MCK_SVEVectorSReg }, },
14493 { 1659 /* frinti */, AArch64::FRINTI_ZPmZ_S, Convert__SVEVectorSReg1_0__Tie0_1_1__SVEPredicate3bAnyReg1_1__SVEVectorSReg1_4, AMFBS_HasSVE, { MCK_SVEVectorSReg, MCK_SVEPredicate3bAnyReg, MCK__47_, MCK_m, MCK_SVEVectorSReg }, },
14504 { 1666 /* frintm */, AArch64::FRINTM_ZPmZ_S, Convert__SVEVectorSReg1_0__Tie0_1_1__SVEPredicate3bAnyReg1_1__SVEVectorSReg1_4, AMFBS_HasSVE, { MCK_SVEVectorSReg, MCK_SVEPredicate3bAnyReg, MCK__47_, MCK_m, MCK_SVEVectorSReg }, },
14515 { 1673 /* frintn */, AArch64::FRINTN_ZPmZ_S, Convert__SVEVectorSReg1_0__Tie0_1_1__SVEPredicate3bAnyReg1_1__SVEVectorSReg1_4, AMFBS_HasSVE, { MCK_SVEVectorSReg, MCK_SVEPredicate3bAnyReg, MCK__47_, MCK_m, MCK_SVEVectorSReg }, },
14526 { 1680 /* frintp */, AArch64::FRINTP_ZPmZ_S, Convert__SVEVectorSReg1_0__Tie0_1_1__SVEPredicate3bAnyReg1_1__SVEVectorSReg1_4, AMFBS_HasSVE, { MCK_SVEVectorSReg, MCK_SVEPredicate3bAnyReg, MCK__47_, MCK_m, MCK_SVEVectorSReg }, },
14537 { 1687 /* frintx */, AArch64::FRINTX_ZPmZ_S, Convert__SVEVectorSReg1_0__Tie0_1_1__SVEPredicate3bAnyReg1_1__SVEVectorSReg1_4, AMFBS_HasSVE, { MCK_SVEVectorSReg, MCK_SVEPredicate3bAnyReg, MCK__47_, MCK_m, MCK_SVEVectorSReg }, },
14548 { 1694 /* frintz */, AArch64::FRINTZ_ZPmZ_S, Convert__SVEVectorSReg1_0__Tie0_1_1__SVEPredicate3bAnyReg1_1__SVEVectorSReg1_4, AMFBS_HasSVE, { MCK_SVEVectorSReg, MCK_SVEPredicate3bAnyReg, MCK__47_, MCK_m, MCK_SVEVectorSReg }, },
14584 { 1724 /* fsqrt */, AArch64::FSQRT_ZPmZ_S, Convert__SVEVectorSReg1_0__Tie0_1_1__SVEPredicate3bAnyReg1_1__SVEVectorSReg1_4, AMFBS_HasSVE, { MCK_SVEVectorSReg, MCK_SVEPredicate3bAnyReg, MCK__47_, MCK_m, MCK_SVEVectorSReg }, },
16645 { 3375 /* movprfx */, AArch64::MOVPRFX_ZPmZ_S, Convert__SVEVectorSReg1_0__Tie0_1_1__SVEPredicate3bAnyReg1_1__SVEVectorSReg1_4, AMFBS_HasSVE, { MCK_SVEVectorSReg, MCK_SVEPredicate3bAnyReg, MCK__47_, MCK_m, MCK_SVEVectorSReg }, },
16736 { 3439 /* neg */, AArch64::NEG_ZPmZ_S, Convert__SVEVectorSReg1_0__Tie0_1_1__SVEPredicate3bAnyReg1_1__SVEVectorSReg1_4, AMFBS_HasSVE, { MCK_SVEVectorSReg, MCK_SVEPredicate3bAnyReg, MCK__47_, MCK_m, MCK_SVEVectorSReg }, },
16756 { 3477 /* not */, AArch64::NOT_ZPmZ_S, Convert__SVEVectorSReg1_0__Tie0_1_1__SVEPredicate3bAnyReg1_1__SVEVectorSReg1_4, AMFBS_HasSVE, { MCK_SVEVectorSReg, MCK_SVEPredicate3bAnyReg, MCK__47_, MCK_m, MCK_SVEVectorSReg }, },
16942 { 3780 /* rbit */, AArch64::RBIT_ZPmZ_S, Convert__SVEVectorSReg1_0__Tie0_1_1__SVEPredicate3bAnyReg1_1__SVEVectorSReg1_4, AMFBS_HasSVE, { MCK_SVEVectorSReg, MCK_SVEPredicate3bAnyReg, MCK__47_, MCK_m, MCK_SVEVectorSReg }, },
16980 { 3841 /* revb */, AArch64::REVB_ZPmZ_S, Convert__SVEVectorSReg1_0__Tie0_1_1__SVEPredicate3bAnyReg1_1__SVEVectorSReg1_4, AMFBS_HasSVE, { MCK_SVEVectorSReg, MCK_SVEPredicate3bAnyReg, MCK__47_, MCK_m, MCK_SVEVectorSReg }, },
16982 { 3846 /* revh */, AArch64::REVH_ZPmZ_S, Convert__SVEVectorSReg1_0__Tie0_1_1__SVEPredicate3bAnyReg1_1__SVEVectorSReg1_4, AMFBS_HasSVE, { MCK_SVEVectorSReg, MCK_SVEPredicate3bAnyReg, MCK__47_, MCK_m, MCK_SVEVectorSReg }, },
17152 { 4110 /* scvtf */, AArch64::SCVTF_ZPmZ_StoS, Convert__SVEVectorSReg1_0__Tie0_1_1__SVEPredicate3bAnyReg1_1__SVEVectorSReg1_4, AMFBS_HasSVE, { MCK_SVEVectorSReg, MCK_SVEPredicate3bAnyReg, MCK__47_, MCK_m, MCK_SVEVectorSReg }, },
17432 { 4570 /* sqabs */, AArch64::SQABS_ZPmZ_S, Convert__SVEVectorSReg1_0__Tie0_1_1__SVEPredicate3bAnyReg1_1__SVEVectorSReg1_4, AMFBS_HasSVE2, { MCK_SVEVectorSReg, MCK_SVEPredicate3bAnyReg, MCK__47_, MCK_m, MCK_SVEVectorSReg }, },
17659 { 4792 /* sqneg */, AArch64::SQNEG_ZPmZ_S, Convert__SVEVectorSReg1_0__Tie0_1_1__SVEPredicate3bAnyReg1_1__SVEVectorSReg1_4, AMFBS_HasSVE2, { MCK_SVEVectorSReg, MCK_SVEPredicate3bAnyReg, MCK__47_, MCK_m, MCK_SVEVectorSReg }, },
19053 { 6076 /* sxtb */, AArch64::SXTB_ZPmZ_S, Convert__SVEVectorSReg1_0__Tie0_1_1__SVEPredicate3bAnyReg1_1__SVEVectorSReg1_4, AMFBS_HasSVE, { MCK_SVEVectorSReg, MCK_SVEPredicate3bAnyReg, MCK__47_, MCK_m, MCK_SVEVectorSReg }, },
19057 { 6081 /* sxth */, AArch64::SXTH_ZPmZ_S, Convert__SVEVectorSReg1_0__Tie0_1_1__SVEPredicate3bAnyReg1_1__SVEVectorSReg1_4, AMFBS_HasSVE, { MCK_SVEVectorSReg, MCK_SVEPredicate3bAnyReg, MCK__47_, MCK_m, MCK_SVEVectorSReg }, },
19296 { 6325 /* ucvtf */, AArch64::UCVTF_ZPmZ_StoS, Convert__SVEVectorSReg1_0__Tie0_1_1__SVEPredicate3bAnyReg1_1__SVEVectorSReg1_4, AMFBS_HasSVE, { MCK_SVEVectorSReg, MCK_SVEPredicate3bAnyReg, MCK__47_, MCK_m, MCK_SVEVectorSReg }, },
19726 { 6727 /* urecpe */, AArch64::URECPE_ZPmZ_S, Convert__SVEVectorSReg1_0__Tie0_1_1__SVEPredicate3bAnyReg1_1__SVEVectorSReg1_4, AMFBS_HasSVE2, { MCK_SVEVectorSReg, MCK_SVEPredicate3bAnyReg, MCK__47_, MCK_m, MCK_SVEVectorSReg }, },
19767 { 6760 /* ursqrte */, AArch64::URSQRTE_ZPmZ_S, Convert__SVEVectorSReg1_0__Tie0_1_1__SVEPredicate3bAnyReg1_1__SVEVectorSReg1_4, AMFBS_HasSVE2, { MCK_SVEVectorSReg, MCK_SVEPredicate3bAnyReg, MCK__47_, MCK_m, MCK_SVEVectorSReg }, },
19868 { 6893 /* uxtb */, AArch64::UXTB_ZPmZ_S, Convert__SVEVectorSReg1_0__Tie0_1_1__SVEPredicate3bAnyReg1_1__SVEVectorSReg1_4, AMFBS_HasSVE, { MCK_SVEVectorSReg, MCK_SVEPredicate3bAnyReg, MCK__47_, MCK_m, MCK_SVEVectorSReg }, },
19872 { 6898 /* uxth */, AArch64::UXTH_ZPmZ_S, Convert__SVEVectorSReg1_0__Tie0_1_1__SVEPredicate3bAnyReg1_1__SVEVectorSReg1_4, AMFBS_HasSVE, { MCK_SVEVectorSReg, MCK_SVEPredicate3bAnyReg, MCK__47_, MCK_m, MCK_SVEVectorSReg }, },
20051 { 0 /* abs */, AArch64::ABS_ZPmZ_S, Convert__SVEVectorSReg1_0__Tie0_1_1__SVEPredicate3bAnyReg1_1__SVEVectorSReg1_4, AMFBS_HasSVE, { MCK_SVEVectorSReg, MCK_SVEPredicate3bAnyReg, MCK__47_, MCK_m, MCK_SVEVectorSReg }, },
20427 { 603 /* cls */, AArch64::CLS_ZPmZ_S, Convert__SVEVectorSReg1_0__Tie0_1_1__SVEPredicate3bAnyReg1_1__SVEVectorSReg1_4, AMFBS_HasSVE, { MCK_SVEVectorSReg, MCK_SVEPredicate3bAnyReg, MCK__47_, MCK_m, MCK_SVEVectorSReg }, },
20439 { 607 /* clz */, AArch64::CLZ_ZPmZ_S, Convert__SVEVectorSReg1_0__Tie0_1_1__SVEPredicate3bAnyReg1_1__SVEVectorSReg1_4, AMFBS_HasSVE, { MCK_SVEVectorSReg, MCK_SVEPredicate3bAnyReg, MCK__47_, MCK_m, MCK_SVEVectorSReg }, },
20708 { 745 /* cnot */, AArch64::CNOT_ZPmZ_S, Convert__SVEVectorSReg1_0__Tie0_1_1__SVEPredicate3bAnyReg1_1__SVEVectorSReg1_4, AMFBS_HasSVE, { MCK_SVEVectorSReg, MCK_SVEPredicate3bAnyReg, MCK__47_, MCK_m, MCK_SVEVectorSReg }, },
20714 { 750 /* cnt */, AArch64::CNT_ZPmZ_S, Convert__SVEVectorSReg1_0__Tie0_1_1__SVEPredicate3bAnyReg1_1__SVEVectorSReg1_4, AMFBS_HasSVE, { MCK_SVEVectorSReg, MCK_SVEPredicate3bAnyReg, MCK__47_, MCK_m, MCK_SVEVectorSReg }, },
20930 { 1043 /* fabs */, AArch64::FABS_ZPmZ_S, Convert__SVEVectorSReg1_0__Tie0_1_1__SVEPredicate3bAnyReg1_1__SVEVectorSReg1_4, AMFBS_HasSVE, { MCK_SVEVectorSReg, MCK_SVEPredicate3bAnyReg, MCK__47_, MCK_m, MCK_SVEVectorSReg }, },
21406 { 1314 /* fcvtzs */, AArch64::FCVTZS_ZPmZ_StoS, Convert__SVEVectorSReg1_0__Tie0_1_1__SVEPredicate3bAnyReg1_1__SVEVectorSReg1_4, AMFBS_HasSVE, { MCK_SVEVectorSReg, MCK_SVEPredicate3bAnyReg, MCK__47_, MCK_m, MCK_SVEVectorSReg }, },
21441 { 1321 /* fcvtzu */, AArch64::FCVTZU_ZPmZ_StoS, Convert__SVEVectorSReg1_0__Tie0_1_1__SVEPredicate3bAnyReg1_1__SVEVectorSReg1_4, AMFBS_HasSVE, { MCK_SVEVectorSReg, MCK_SVEPredicate3bAnyReg, MCK__47_, MCK_m, MCK_SVEVectorSReg }, },
21468 { 1358 /* flogb */, AArch64::FLOGB_ZPmZ_S, Convert__SVEVectorSReg1_0__Tie0_1_1__SVEPredicate3bAnyReg1_1__SVEVectorSReg1_4, AMFBS_HasSVE2, { MCK_SVEVectorSReg, MCK_SVEPredicate3bAnyReg, MCK__47_, MCK_m, MCK_SVEVectorSReg }, },
21760 { 1546 /* fneg */, AArch64::FNEG_ZPmZ_S, Convert__SVEVectorSReg1_0__Tie0_1_1__SVEPredicate3bAnyReg1_1__SVEVectorSReg1_4, AMFBS_HasSVE, { MCK_SVEVectorSReg, MCK_SVEPredicate3bAnyReg, MCK__47_, MCK_m, MCK_SVEVectorSReg }, },
21809 { 1609 /* frecpx */, AArch64::FRECPX_ZPmZ_S, Convert__SVEVectorSReg1_0__Tie0_1_1__SVEPredicate3bAnyReg1_1__SVEVectorSReg1_4, AMFBS_HasSVE, { MCK_SVEVectorSReg, MCK_SVEPredicate3bAnyReg, MCK__47_, MCK_m, MCK_SVEVectorSReg }, },
21840 { 1652 /* frinta */, AArch64::FRINTA_ZPmZ_S, Convert__SVEVectorSReg1_0__Tie0_1_1__SVEPredicate3bAnyReg1_1__SVEVectorSReg1_4, AMFBS_HasSVE, { MCK_SVEVectorSReg, MCK_SVEPredicate3bAnyReg, MCK__47_, MCK_m, MCK_SVEVectorSReg }, },
21851 { 1659 /* frinti */, AArch64::FRINTI_ZPmZ_S, Convert__SVEVectorSReg1_0__Tie0_1_1__SVEPredicate3bAnyReg1_1__SVEVectorSReg1_4, AMFBS_HasSVE, { MCK_SVEVectorSReg, MCK_SVEPredicate3bAnyReg, MCK__47_, MCK_m, MCK_SVEVectorSReg }, },
21862 { 1666 /* frintm */, AArch64::FRINTM_ZPmZ_S, Convert__SVEVectorSReg1_0__Tie0_1_1__SVEPredicate3bAnyReg1_1__SVEVectorSReg1_4, AMFBS_HasSVE, { MCK_SVEVectorSReg, MCK_SVEPredicate3bAnyReg, MCK__47_, MCK_m, MCK_SVEVectorSReg }, },
21873 { 1673 /* frintn */, AArch64::FRINTN_ZPmZ_S, Convert__SVEVectorSReg1_0__Tie0_1_1__SVEPredicate3bAnyReg1_1__SVEVectorSReg1_4, AMFBS_HasSVE, { MCK_SVEVectorSReg, MCK_SVEPredicate3bAnyReg, MCK__47_, MCK_m, MCK_SVEVectorSReg }, },
21884 { 1680 /* frintp */, AArch64::FRINTP_ZPmZ_S, Convert__SVEVectorSReg1_0__Tie0_1_1__SVEPredicate3bAnyReg1_1__SVEVectorSReg1_4, AMFBS_HasSVE, { MCK_SVEVectorSReg, MCK_SVEPredicate3bAnyReg, MCK__47_, MCK_m, MCK_SVEVectorSReg }, },
21895 { 1687 /* frintx */, AArch64::FRINTX_ZPmZ_S, Convert__SVEVectorSReg1_0__Tie0_1_1__SVEPredicate3bAnyReg1_1__SVEVectorSReg1_4, AMFBS_HasSVE, { MCK_SVEVectorSReg, MCK_SVEPredicate3bAnyReg, MCK__47_, MCK_m, MCK_SVEVectorSReg }, },
21906 { 1694 /* frintz */, AArch64::FRINTZ_ZPmZ_S, Convert__SVEVectorSReg1_0__Tie0_1_1__SVEPredicate3bAnyReg1_1__SVEVectorSReg1_4, AMFBS_HasSVE, { MCK_SVEVectorSReg, MCK_SVEPredicate3bAnyReg, MCK__47_, MCK_m, MCK_SVEVectorSReg }, },
21942 { 1724 /* fsqrt */, AArch64::FSQRT_ZPmZ_S, Convert__SVEVectorSReg1_0__Tie0_1_1__SVEPredicate3bAnyReg1_1__SVEVectorSReg1_4, AMFBS_HasSVE, { MCK_SVEVectorSReg, MCK_SVEPredicate3bAnyReg, MCK__47_, MCK_m, MCK_SVEVectorSReg }, },
24003 { 3375 /* movprfx */, AArch64::MOVPRFX_ZPmZ_S, Convert__SVEVectorSReg1_0__Tie0_1_1__SVEPredicate3bAnyReg1_1__SVEVectorSReg1_4, AMFBS_HasSVE, { MCK_SVEVectorSReg, MCK_SVEPredicate3bAnyReg, MCK__47_, MCK_m, MCK_SVEVectorSReg }, },
24094 { 3439 /* neg */, AArch64::NEG_ZPmZ_S, Convert__SVEVectorSReg1_0__Tie0_1_1__SVEPredicate3bAnyReg1_1__SVEVectorSReg1_4, AMFBS_HasSVE, { MCK_SVEVectorSReg, MCK_SVEPredicate3bAnyReg, MCK__47_, MCK_m, MCK_SVEVectorSReg }, },
24114 { 3477 /* not */, AArch64::NOT_ZPmZ_S, Convert__SVEVectorSReg1_0__Tie0_1_1__SVEPredicate3bAnyReg1_1__SVEVectorSReg1_4, AMFBS_HasSVE, { MCK_SVEVectorSReg, MCK_SVEPredicate3bAnyReg, MCK__47_, MCK_m, MCK_SVEVectorSReg }, },
24300 { 3780 /* rbit */, AArch64::RBIT_ZPmZ_S, Convert__SVEVectorSReg1_0__Tie0_1_1__SVEPredicate3bAnyReg1_1__SVEVectorSReg1_4, AMFBS_HasSVE, { MCK_SVEVectorSReg, MCK_SVEPredicate3bAnyReg, MCK__47_, MCK_m, MCK_SVEVectorSReg }, },
24338 { 3841 /* revb */, AArch64::REVB_ZPmZ_S, Convert__SVEVectorSReg1_0__Tie0_1_1__SVEPredicate3bAnyReg1_1__SVEVectorSReg1_4, AMFBS_HasSVE, { MCK_SVEVectorSReg, MCK_SVEPredicate3bAnyReg, MCK__47_, MCK_m, MCK_SVEVectorSReg }, },
24340 { 3846 /* revh */, AArch64::REVH_ZPmZ_S, Convert__SVEVectorSReg1_0__Tie0_1_1__SVEPredicate3bAnyReg1_1__SVEVectorSReg1_4, AMFBS_HasSVE, { MCK_SVEVectorSReg, MCK_SVEPredicate3bAnyReg, MCK__47_, MCK_m, MCK_SVEVectorSReg }, },
24510 { 4110 /* scvtf */, AArch64::SCVTF_ZPmZ_StoS, Convert__SVEVectorSReg1_0__Tie0_1_1__SVEPredicate3bAnyReg1_1__SVEVectorSReg1_4, AMFBS_HasSVE, { MCK_SVEVectorSReg, MCK_SVEPredicate3bAnyReg, MCK__47_, MCK_m, MCK_SVEVectorSReg }, },
24790 { 4570 /* sqabs */, AArch64::SQABS_ZPmZ_S, Convert__SVEVectorSReg1_0__Tie0_1_1__SVEPredicate3bAnyReg1_1__SVEVectorSReg1_4, AMFBS_HasSVE2, { MCK_SVEVectorSReg, MCK_SVEPredicate3bAnyReg, MCK__47_, MCK_m, MCK_SVEVectorSReg }, },
25017 { 4792 /* sqneg */, AArch64::SQNEG_ZPmZ_S, Convert__SVEVectorSReg1_0__Tie0_1_1__SVEPredicate3bAnyReg1_1__SVEVectorSReg1_4, AMFBS_HasSVE2, { MCK_SVEVectorSReg, MCK_SVEPredicate3bAnyReg, MCK__47_, MCK_m, MCK_SVEVectorSReg }, },
26411 { 6076 /* sxtb */, AArch64::SXTB_ZPmZ_S, Convert__SVEVectorSReg1_0__Tie0_1_1__SVEPredicate3bAnyReg1_1__SVEVectorSReg1_4, AMFBS_HasSVE, { MCK_SVEVectorSReg, MCK_SVEPredicate3bAnyReg, MCK__47_, MCK_m, MCK_SVEVectorSReg }, },
26415 { 6081 /* sxth */, AArch64::SXTH_ZPmZ_S, Convert__SVEVectorSReg1_0__Tie0_1_1__SVEPredicate3bAnyReg1_1__SVEVectorSReg1_4, AMFBS_HasSVE, { MCK_SVEVectorSReg, MCK_SVEPredicate3bAnyReg, MCK__47_, MCK_m, MCK_SVEVectorSReg }, },
26654 { 6325 /* ucvtf */, AArch64::UCVTF_ZPmZ_StoS, Convert__SVEVectorSReg1_0__Tie0_1_1__SVEPredicate3bAnyReg1_1__SVEVectorSReg1_4, AMFBS_HasSVE, { MCK_SVEVectorSReg, MCK_SVEPredicate3bAnyReg, MCK__47_, MCK_m, MCK_SVEVectorSReg }, },
27084 { 6727 /* urecpe */, AArch64::URECPE_ZPmZ_S, Convert__SVEVectorSReg1_0__Tie0_1_1__SVEPredicate3bAnyReg1_1__SVEVectorSReg1_4, AMFBS_HasSVE2, { MCK_SVEVectorSReg, MCK_SVEPredicate3bAnyReg, MCK__47_, MCK_m, MCK_SVEVectorSReg }, },
27125 { 6760 /* ursqrte */, AArch64::URSQRTE_ZPmZ_S, Convert__SVEVectorSReg1_0__Tie0_1_1__SVEPredicate3bAnyReg1_1__SVEVectorSReg1_4, AMFBS_HasSVE2, { MCK_SVEVectorSReg, MCK_SVEPredicate3bAnyReg, MCK__47_, MCK_m, MCK_SVEVectorSReg }, },
27226 { 6893 /* uxtb */, AArch64::UXTB_ZPmZ_S, Convert__SVEVectorSReg1_0__Tie0_1_1__SVEPredicate3bAnyReg1_1__SVEVectorSReg1_4, AMFBS_HasSVE, { MCK_SVEVectorSReg, MCK_SVEPredicate3bAnyReg, MCK__47_, MCK_m, MCK_SVEVectorSReg }, },
27230 { 6898 /* uxth */, AArch64::UXTH_ZPmZ_S, Convert__SVEVectorSReg1_0__Tie0_1_1__SVEPredicate3bAnyReg1_1__SVEVectorSReg1_4, AMFBS_HasSVE, { MCK_SVEVectorSReg, MCK_SVEPredicate3bAnyReg, MCK__47_, MCK_m, MCK_SVEVectorSReg }, },