reference, declarationdefinition
definition → references, declarations, derived classes, virtual overrides
reference to multiple definitions → definitions
unreferenced

References

gen/lib/Target/AArch64/AArch64GenAsmMatcher.inc
13886   { 1184 /* fcvt */, AArch64::FCVT_ZPmZ_DtoS, Convert__SVEVectorSReg1_0__Tie0_1_1__SVEPredicate3bAnyReg1_1__SVEVectorDReg1_4, AMFBS_HasSVE, { MCK_SVEVectorSReg, MCK_SVEPredicate3bAnyReg, MCK__47_, MCK_m, MCK_SVEVectorDReg }, },
13970   { 1257 /* fcvtnt */, AArch64::FCVTNT_ZPmZ_DtoS, Convert__SVEVectorSReg1_0__Tie0_1_1__SVEPredicate3bAnyReg1_1__SVEVectorDReg1_4, AMFBS_HasSVE2, { MCK_SVEVectorSReg, MCK_SVEPredicate3bAnyReg, MCK__47_, MCK_m, MCK_SVEVectorDReg }, },
14013   { 1285 /* fcvtx */, AArch64::FCVTX_ZPmZ_DtoS, Convert__SVEVectorSReg1_0__Tie0_1_1__SVEPredicate3bAnyReg1_1__SVEVectorDReg1_4, AMFBS_HasSVE2, { MCK_SVEVectorSReg, MCK_SVEPredicate3bAnyReg, MCK__47_, MCK_m, MCK_SVEVectorDReg }, },
14017   { 1306 /* fcvtxnt */, AArch64::FCVTXNT_ZPmZ_DtoS, Convert__SVEVectorSReg1_0__Tie0_1_1__SVEPredicate3bAnyReg1_1__SVEVectorDReg1_4, AMFBS_HasSVE2, { MCK_SVEVectorSReg, MCK_SVEPredicate3bAnyReg, MCK__47_, MCK_m, MCK_SVEVectorDReg }, },
14049   { 1314 /* fcvtzs */, AArch64::FCVTZS_ZPmZ_DtoS, Convert__SVEVectorSReg1_0__Tie0_1_1__SVEPredicate3bAnyReg1_1__SVEVectorDReg1_4, AMFBS_HasSVE, { MCK_SVEVectorSReg, MCK_SVEPredicate3bAnyReg, MCK__47_, MCK_m, MCK_SVEVectorDReg }, },
14084   { 1321 /* fcvtzu */, AArch64::FCVTZU_ZPmZ_DtoS, Convert__SVEVectorSReg1_0__Tie0_1_1__SVEPredicate3bAnyReg1_1__SVEVectorDReg1_4, AMFBS_HasSVE, { MCK_SVEVectorSReg, MCK_SVEPredicate3bAnyReg, MCK__47_, MCK_m, MCK_SVEVectorDReg }, },
17153   { 4110 /* scvtf */, AArch64::SCVTF_ZPmZ_DtoS, Convert__SVEVectorSReg1_0__Tie0_1_1__SVEPredicate3bAnyReg1_1__SVEVectorDReg1_4, AMFBS_HasSVE, { MCK_SVEVectorSReg, MCK_SVEPredicate3bAnyReg, MCK__47_, MCK_m, MCK_SVEVectorDReg }, },
19297   { 6325 /* ucvtf */, AArch64::UCVTF_ZPmZ_DtoS, Convert__SVEVectorSReg1_0__Tie0_1_1__SVEPredicate3bAnyReg1_1__SVEVectorDReg1_4, AMFBS_HasSVE, { MCK_SVEVectorSReg, MCK_SVEPredicate3bAnyReg, MCK__47_, MCK_m, MCK_SVEVectorDReg }, },
21244   { 1184 /* fcvt */, AArch64::FCVT_ZPmZ_DtoS, Convert__SVEVectorSReg1_0__Tie0_1_1__SVEPredicate3bAnyReg1_1__SVEVectorDReg1_4, AMFBS_HasSVE, { MCK_SVEVectorSReg, MCK_SVEPredicate3bAnyReg, MCK__47_, MCK_m, MCK_SVEVectorDReg }, },
21328   { 1257 /* fcvtnt */, AArch64::FCVTNT_ZPmZ_DtoS, Convert__SVEVectorSReg1_0__Tie0_1_1__SVEPredicate3bAnyReg1_1__SVEVectorDReg1_4, AMFBS_HasSVE2, { MCK_SVEVectorSReg, MCK_SVEPredicate3bAnyReg, MCK__47_, MCK_m, MCK_SVEVectorDReg }, },
21371   { 1285 /* fcvtx */, AArch64::FCVTX_ZPmZ_DtoS, Convert__SVEVectorSReg1_0__Tie0_1_1__SVEPredicate3bAnyReg1_1__SVEVectorDReg1_4, AMFBS_HasSVE2, { MCK_SVEVectorSReg, MCK_SVEPredicate3bAnyReg, MCK__47_, MCK_m, MCK_SVEVectorDReg }, },
21375   { 1306 /* fcvtxnt */, AArch64::FCVTXNT_ZPmZ_DtoS, Convert__SVEVectorSReg1_0__Tie0_1_1__SVEPredicate3bAnyReg1_1__SVEVectorDReg1_4, AMFBS_HasSVE2, { MCK_SVEVectorSReg, MCK_SVEPredicate3bAnyReg, MCK__47_, MCK_m, MCK_SVEVectorDReg }, },
21407   { 1314 /* fcvtzs */, AArch64::FCVTZS_ZPmZ_DtoS, Convert__SVEVectorSReg1_0__Tie0_1_1__SVEPredicate3bAnyReg1_1__SVEVectorDReg1_4, AMFBS_HasSVE, { MCK_SVEVectorSReg, MCK_SVEPredicate3bAnyReg, MCK__47_, MCK_m, MCK_SVEVectorDReg }, },
21442   { 1321 /* fcvtzu */, AArch64::FCVTZU_ZPmZ_DtoS, Convert__SVEVectorSReg1_0__Tie0_1_1__SVEPredicate3bAnyReg1_1__SVEVectorDReg1_4, AMFBS_HasSVE, { MCK_SVEVectorSReg, MCK_SVEPredicate3bAnyReg, MCK__47_, MCK_m, MCK_SVEVectorDReg }, },
24511   { 4110 /* scvtf */, AArch64::SCVTF_ZPmZ_DtoS, Convert__SVEVectorSReg1_0__Tie0_1_1__SVEPredicate3bAnyReg1_1__SVEVectorDReg1_4, AMFBS_HasSVE, { MCK_SVEVectorSReg, MCK_SVEPredicate3bAnyReg, MCK__47_, MCK_m, MCK_SVEVectorDReg }, },
26655   { 6325 /* ucvtf */, AArch64::UCVTF_ZPmZ_DtoS, Convert__SVEVectorSReg1_0__Tie0_1_1__SVEPredicate3bAnyReg1_1__SVEVectorDReg1_4, AMFBS_HasSVE, { MCK_SVEVectorSReg, MCK_SVEPredicate3bAnyReg, MCK__47_, MCK_m, MCK_SVEVectorDReg }, },