reference, declaration → definition definition → references, declarations, derived classes, virtual overrides reference to multiple definitions → definitions unreferenced |
17105 { 4067 /* saddwb */, AArch64::SADDWB_ZZZ_S, Convert__SVEVectorSReg1_0__SVEVectorSReg1_1__SVEVectorHReg1_2, AMFBS_HasSVE2, { MCK_SVEVectorSReg, MCK_SVEVectorSReg, MCK_SVEVectorHReg }, }, 17108 { 4074 /* saddwt */, AArch64::SADDWT_ZZZ_S, Convert__SVEVectorSReg1_0__SVEVectorSReg1_1__SVEVectorHReg1_2, AMFBS_HasSVE2, { MCK_SVEVectorSReg, MCK_SVEVectorSReg, MCK_SVEVectorHReg }, }, 18038 { 5220 /* ssubwb */, AArch64::SSUBWB_ZZZ_S, Convert__SVEVectorSReg1_0__SVEVectorSReg1_1__SVEVectorHReg1_2, AMFBS_HasSVE2, { MCK_SVEVectorSReg, MCK_SVEVectorSReg, MCK_SVEVectorHReg }, }, 18041 { 5227 /* ssubwt */, AArch64::SSUBWT_ZZZ_S, Convert__SVEVectorSReg1_0__SVEVectorSReg1_1__SVEVectorHReg1_2, AMFBS_HasSVE2, { MCK_SVEVectorSReg, MCK_SVEVectorSReg, MCK_SVEVectorHReg }, }, 19258 { 6306 /* uaddwb */, AArch64::UADDWB_ZZZ_S, Convert__SVEVectorSReg1_0__SVEVectorSReg1_1__SVEVectorHReg1_2, AMFBS_HasSVE2, { MCK_SVEVectorSReg, MCK_SVEVectorSReg, MCK_SVEVectorHReg }, }, 19261 { 6313 /* uaddwt */, AArch64::UADDWT_ZZZ_S, Convert__SVEVectorSReg1_0__SVEVectorSReg1_1__SVEVectorHReg1_2, AMFBS_HasSVE2, { MCK_SVEVectorSReg, MCK_SVEVectorSReg, MCK_SVEVectorHReg }, }, 19854 { 6863 /* usubwb */, AArch64::USUBWB_ZZZ_S, Convert__SVEVectorSReg1_0__SVEVectorSReg1_1__SVEVectorHReg1_2, AMFBS_HasSVE2, { MCK_SVEVectorSReg, MCK_SVEVectorSReg, MCK_SVEVectorHReg }, }, 19857 { 6870 /* usubwt */, AArch64::USUBWT_ZZZ_S, Convert__SVEVectorSReg1_0__SVEVectorSReg1_1__SVEVectorHReg1_2, AMFBS_HasSVE2, { MCK_SVEVectorSReg, MCK_SVEVectorSReg, MCK_SVEVectorHReg }, }, 24463 { 4067 /* saddwb */, AArch64::SADDWB_ZZZ_S, Convert__SVEVectorSReg1_0__SVEVectorSReg1_1__SVEVectorHReg1_2, AMFBS_HasSVE2, { MCK_SVEVectorSReg, MCK_SVEVectorSReg, MCK_SVEVectorHReg }, }, 24466 { 4074 /* saddwt */, AArch64::SADDWT_ZZZ_S, Convert__SVEVectorSReg1_0__SVEVectorSReg1_1__SVEVectorHReg1_2, AMFBS_HasSVE2, { MCK_SVEVectorSReg, MCK_SVEVectorSReg, MCK_SVEVectorHReg }, }, 25396 { 5220 /* ssubwb */, AArch64::SSUBWB_ZZZ_S, Convert__SVEVectorSReg1_0__SVEVectorSReg1_1__SVEVectorHReg1_2, AMFBS_HasSVE2, { MCK_SVEVectorSReg, MCK_SVEVectorSReg, MCK_SVEVectorHReg }, }, 25399 { 5227 /* ssubwt */, AArch64::SSUBWT_ZZZ_S, Convert__SVEVectorSReg1_0__SVEVectorSReg1_1__SVEVectorHReg1_2, AMFBS_HasSVE2, { MCK_SVEVectorSReg, MCK_SVEVectorSReg, MCK_SVEVectorHReg }, }, 26616 { 6306 /* uaddwb */, AArch64::UADDWB_ZZZ_S, Convert__SVEVectorSReg1_0__SVEVectorSReg1_1__SVEVectorHReg1_2, AMFBS_HasSVE2, { MCK_SVEVectorSReg, MCK_SVEVectorSReg, MCK_SVEVectorHReg }, }, 26619 { 6313 /* uaddwt */, AArch64::UADDWT_ZZZ_S, Convert__SVEVectorSReg1_0__SVEVectorSReg1_1__SVEVectorHReg1_2, AMFBS_HasSVE2, { MCK_SVEVectorSReg, MCK_SVEVectorSReg, MCK_SVEVectorHReg }, }, 27212 { 6863 /* usubwb */, AArch64::USUBWB_ZZZ_S, Convert__SVEVectorSReg1_0__SVEVectorSReg1_1__SVEVectorHReg1_2, AMFBS_HasSVE2, { MCK_SVEVectorSReg, MCK_SVEVectorSReg, MCK_SVEVectorHReg }, }, 27215 { 6870 /* usubwt */, AArch64::USUBWT_ZZZ_S, Convert__SVEVectorSReg1_0__SVEVectorSReg1_1__SVEVectorHReg1_2, AMFBS_HasSVE2, { MCK_SVEVectorSReg, MCK_SVEVectorSReg, MCK_SVEVectorHReg }, },