reference, declaration → definition definition → references, declarations, derived classes, virtual overrides reference to multiple definitions → definitions unreferenced |
12715 { 25 /* add */, AArch64::ADD_ZI_H, Convert__SVEVectorHReg1_0__Tie0_1_2__SVEAddSubImm162_2, AMFBS_HasSVE, { MCK_SVEVectorHReg, MCK_SVEVectorHReg, MCK_SVEAddSubImm16 }, }, 17439 { 4576 /* sqadd */, AArch64::SQADD_ZI_H, Convert__SVEVectorHReg1_0__Tie0_1_2__SVEAddSubImm162_2, AMFBS_HasSVE, { MCK_SVEVectorHReg, MCK_SVEVectorHReg, MCK_SVEAddSubImm16 }, }, 17857 { 5010 /* sqsub */, AArch64::SQSUB_ZI_H, Convert__SVEVectorHReg1_0__Tie0_1_2__SVEAddSubImm162_2, AMFBS_HasSVE, { MCK_SVEVectorHReg, MCK_SVEVectorHReg, MCK_SVEAddSubImm16 }, }, 18952 { 5924 /* sub */, AArch64::SUB_ZI_H, Convert__SVEVectorHReg1_0__Tie0_1_2__SVEAddSubImm162_2, AMFBS_HasSVE, { MCK_SVEVectorHReg, MCK_SVEVectorHReg, MCK_SVEAddSubImm16 }, }, 18991 { 5971 /* subr */, AArch64::SUBR_ZI_H, Convert__SVEVectorHReg1_0__Tie0_1_2__SVEAddSubImm162_2, AMFBS_HasSVE, { MCK_SVEVectorHReg, MCK_SVEVectorHReg, MCK_SVEAddSubImm16 }, }, 19486 { 6517 /* uqadd */, AArch64::UQADD_ZI_H, Convert__SVEVectorHReg1_0__Tie0_1_2__SVEAddSubImm162_2, AMFBS_HasSVE, { MCK_SVEVectorHReg, MCK_SVEVectorHReg, MCK_SVEAddSubImm16 }, }, 19686 { 6687 /* uqsub */, AArch64::UQSUB_ZI_H, Convert__SVEVectorHReg1_0__Tie0_1_2__SVEAddSubImm162_2, AMFBS_HasSVE, { MCK_SVEVectorHReg, MCK_SVEVectorHReg, MCK_SVEAddSubImm16 }, }, 20073 { 25 /* add */, AArch64::ADD_ZI_H, Convert__SVEVectorHReg1_0__Tie0_1_2__SVEAddSubImm162_2, AMFBS_HasSVE, { MCK_SVEVectorHReg, MCK_SVEVectorHReg, MCK_SVEAddSubImm16 }, }, 24797 { 4576 /* sqadd */, AArch64::SQADD_ZI_H, Convert__SVEVectorHReg1_0__Tie0_1_2__SVEAddSubImm162_2, AMFBS_HasSVE, { MCK_SVEVectorHReg, MCK_SVEVectorHReg, MCK_SVEAddSubImm16 }, }, 25215 { 5010 /* sqsub */, AArch64::SQSUB_ZI_H, Convert__SVEVectorHReg1_0__Tie0_1_2__SVEAddSubImm162_2, AMFBS_HasSVE, { MCK_SVEVectorHReg, MCK_SVEVectorHReg, MCK_SVEAddSubImm16 }, }, 26310 { 5924 /* sub */, AArch64::SUB_ZI_H, Convert__SVEVectorHReg1_0__Tie0_1_2__SVEAddSubImm162_2, AMFBS_HasSVE, { MCK_SVEVectorHReg, MCK_SVEVectorHReg, MCK_SVEAddSubImm16 }, }, 26349 { 5971 /* subr */, AArch64::SUBR_ZI_H, Convert__SVEVectorHReg1_0__Tie0_1_2__SVEAddSubImm162_2, AMFBS_HasSVE, { MCK_SVEVectorHReg, MCK_SVEVectorHReg, MCK_SVEAddSubImm16 }, }, 26844 { 6517 /* uqadd */, AArch64::UQADD_ZI_H, Convert__SVEVectorHReg1_0__Tie0_1_2__SVEAddSubImm162_2, AMFBS_HasSVE, { MCK_SVEVectorHReg, MCK_SVEVectorHReg, MCK_SVEAddSubImm16 }, }, 27044 { 6687 /* uqsub */, AArch64::UQSUB_ZI_H, Convert__SVEVectorHReg1_0__Tie0_1_2__SVEAddSubImm162_2, AMFBS_HasSVE, { MCK_SVEVectorHReg, MCK_SVEVectorHReg, MCK_SVEAddSubImm16 }, },