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reference to multiple definitions → definitions
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References

gen/lib/Target/AArch64/AArch64GenAsmMatcher.inc
13529   { 984 /* eorbt */, AArch64::EORBT_ZZZ_H, Convert__SVEVectorHReg1_0__Tie0_1_1__SVEVectorHReg1_1__SVEVectorHReg1_2, AMFBS_HasSVE2, { MCK_SVEVectorHReg, MCK_SVEVectorHReg, MCK_SVEVectorHReg }, },
13534   { 995 /* eortb */, AArch64::EORTB_ZZZ_H, Convert__SVEVectorHReg1_0__Tie0_1_1__SVEVectorHReg1_1__SVEVectorHReg1_2, AMFBS_HasSVE2, { MCK_SVEVectorHReg, MCK_SVEVectorHReg, MCK_SVEVectorHReg }, },
17016   { 3928 /* saba */, AArch64::SABA_ZZZ_H, Convert__SVEVectorHReg1_0__Tie0_1_1__SVEVectorHReg1_1__SVEVectorHReg1_2, AMFBS_HasSVE2, { MCK_SVEVectorHReg, MCK_SVEVectorHReg, MCK_SVEVectorHReg }, },
17670   { 4808 /* sqrdmlah */, AArch64::SQRDMLAH_ZZZ_H, Convert__SVEVectorHReg1_0__Tie0_1_1__SVEVectorHReg1_1__SVEVectorHReg1_2, AMFBS_HasSVE2, { MCK_SVEVectorHReg, MCK_SVEVectorHReg, MCK_SVEVectorHReg }, },
17689   { 4817 /* sqrdmlsh */, AArch64::SQRDMLSH_ZZZ_H, Convert__SVEVectorHReg1_0__Tie0_1_1__SVEVectorHReg1_1__SVEVectorHReg1_2, AMFBS_HasSVE2, { MCK_SVEVectorHReg, MCK_SVEVectorHReg, MCK_SVEVectorHReg }, },
19107   { 6120 /* tbx */, AArch64::TBX_ZZZ_H, Convert__SVEVectorHReg1_0__Tie0_1_1__SVEVectorHReg1_1__SVEVectorHReg1_2, AMFBS_HasSVE2, { MCK_SVEVectorHReg, MCK_SVEVectorHReg, MCK_SVEVectorHReg }, },
19171   { 6175 /* uaba */, AArch64::UABA_ZZZ_H, Convert__SVEVectorHReg1_0__Tie0_1_1__SVEVectorHReg1_1__SVEVectorHReg1_2, AMFBS_HasSVE2, { MCK_SVEVectorHReg, MCK_SVEVectorHReg, MCK_SVEVectorHReg }, },
20887   { 984 /* eorbt */, AArch64::EORBT_ZZZ_H, Convert__SVEVectorHReg1_0__Tie0_1_1__SVEVectorHReg1_1__SVEVectorHReg1_2, AMFBS_HasSVE2, { MCK_SVEVectorHReg, MCK_SVEVectorHReg, MCK_SVEVectorHReg }, },
20892   { 995 /* eortb */, AArch64::EORTB_ZZZ_H, Convert__SVEVectorHReg1_0__Tie0_1_1__SVEVectorHReg1_1__SVEVectorHReg1_2, AMFBS_HasSVE2, { MCK_SVEVectorHReg, MCK_SVEVectorHReg, MCK_SVEVectorHReg }, },
24374   { 3928 /* saba */, AArch64::SABA_ZZZ_H, Convert__SVEVectorHReg1_0__Tie0_1_1__SVEVectorHReg1_1__SVEVectorHReg1_2, AMFBS_HasSVE2, { MCK_SVEVectorHReg, MCK_SVEVectorHReg, MCK_SVEVectorHReg }, },
25028   { 4808 /* sqrdmlah */, AArch64::SQRDMLAH_ZZZ_H, Convert__SVEVectorHReg1_0__Tie0_1_1__SVEVectorHReg1_1__SVEVectorHReg1_2, AMFBS_HasSVE2, { MCK_SVEVectorHReg, MCK_SVEVectorHReg, MCK_SVEVectorHReg }, },
25047   { 4817 /* sqrdmlsh */, AArch64::SQRDMLSH_ZZZ_H, Convert__SVEVectorHReg1_0__Tie0_1_1__SVEVectorHReg1_1__SVEVectorHReg1_2, AMFBS_HasSVE2, { MCK_SVEVectorHReg, MCK_SVEVectorHReg, MCK_SVEVectorHReg }, },
26465   { 6120 /* tbx */, AArch64::TBX_ZZZ_H, Convert__SVEVectorHReg1_0__Tie0_1_1__SVEVectorHReg1_1__SVEVectorHReg1_2, AMFBS_HasSVE2, { MCK_SVEVectorHReg, MCK_SVEVectorHReg, MCK_SVEVectorHReg }, },
26529   { 6175 /* uaba */, AArch64::UABA_ZZZ_H, Convert__SVEVectorHReg1_0__Tie0_1_1__SVEVectorHReg1_1__SVEVectorHReg1_2, AMFBS_HasSVE2, { MCK_SVEVectorHReg, MCK_SVEVectorHReg, MCK_SVEVectorHReg }, },