reference, declaration → definition definition → references, declarations, derived classes, virtual overrides reference to multiple definitions → definitions unreferenced |
16998 { 3883 /* rshrnb */, AArch64::RSHRNB_ZZI_H, Convert__SVEVectorHReg1_0__SVEVectorSReg1_1__Imm1_161_2, AMFBS_HasSVE2, { MCK_SVEVectorHReg, MCK_SVEVectorSReg, MCK_Imm1_16 }, }, 17224 { 4311 /* shrnb */, AArch64::SHRNB_ZZI_H, Convert__SVEVectorHReg1_0__SVEVectorSReg1_1__Imm1_161_2, AMFBS_HasSVE2, { MCK_SVEVectorHReg, MCK_SVEVectorSReg, MCK_Imm1_16 }, }, 17753 { 4867 /* sqrshrnb */, AArch64::SQRSHRNB_ZZI_H, Convert__SVEVectorHReg1_0__SVEVectorSReg1_1__Imm1_161_2, AMFBS_HasSVE2, { MCK_SVEVectorHReg, MCK_SVEVectorSReg, MCK_Imm1_16 }, }, 17768 { 4904 /* sqrshrunb */, AArch64::SQRSHRUNB_ZZI_H, Convert__SVEVectorHReg1_0__SVEVectorSReg1_1__Imm1_161_2, AMFBS_HasSVE2, { MCK_SVEVectorHReg, MCK_SVEVectorSReg, MCK_Imm1_16 }, }, 17832 { 4959 /* sqshrnb */, AArch64::SQSHRNB_ZZI_H, Convert__SVEVectorHReg1_0__SVEVectorSReg1_1__Imm1_161_2, AMFBS_HasSVE2, { MCK_SVEVectorHReg, MCK_SVEVectorSReg, MCK_Imm1_16 }, }, 17847 { 4992 /* sqshrunb */, AArch64::SQSHRUNB_ZZI_H, Convert__SVEVectorHReg1_0__SVEVectorSReg1_1__Imm1_161_2, AMFBS_HasSVE2, { MCK_SVEVectorHReg, MCK_SVEVectorSReg, MCK_Imm1_16 }, }, 19627 { 6625 /* uqrshrnb */, AArch64::UQRSHRNB_ZZI_H, Convert__SVEVectorHReg1_0__SVEVectorSReg1_1__Imm1_161_2, AMFBS_HasSVE2, { MCK_SVEVectorHReg, MCK_SVEVectorSReg, MCK_Imm1_16 }, }, 19676 { 6671 /* uqshrnb */, AArch64::UQSHRNB_ZZI_H, Convert__SVEVectorHReg1_0__SVEVectorSReg1_1__Imm1_161_2, AMFBS_HasSVE2, { MCK_SVEVectorHReg, MCK_SVEVectorSReg, MCK_Imm1_16 }, }, 24356 { 3883 /* rshrnb */, AArch64::RSHRNB_ZZI_H, Convert__SVEVectorHReg1_0__SVEVectorSReg1_1__Imm1_161_2, AMFBS_HasSVE2, { MCK_SVEVectorHReg, MCK_SVEVectorSReg, MCK_Imm1_16 }, }, 24582 { 4311 /* shrnb */, AArch64::SHRNB_ZZI_H, Convert__SVEVectorHReg1_0__SVEVectorSReg1_1__Imm1_161_2, AMFBS_HasSVE2, { MCK_SVEVectorHReg, MCK_SVEVectorSReg, MCK_Imm1_16 }, }, 25111 { 4867 /* sqrshrnb */, AArch64::SQRSHRNB_ZZI_H, Convert__SVEVectorHReg1_0__SVEVectorSReg1_1__Imm1_161_2, AMFBS_HasSVE2, { MCK_SVEVectorHReg, MCK_SVEVectorSReg, MCK_Imm1_16 }, }, 25126 { 4904 /* sqrshrunb */, AArch64::SQRSHRUNB_ZZI_H, Convert__SVEVectorHReg1_0__SVEVectorSReg1_1__Imm1_161_2, AMFBS_HasSVE2, { MCK_SVEVectorHReg, MCK_SVEVectorSReg, MCK_Imm1_16 }, }, 25190 { 4959 /* sqshrnb */, AArch64::SQSHRNB_ZZI_H, Convert__SVEVectorHReg1_0__SVEVectorSReg1_1__Imm1_161_2, AMFBS_HasSVE2, { MCK_SVEVectorHReg, MCK_SVEVectorSReg, MCK_Imm1_16 }, }, 25205 { 4992 /* sqshrunb */, AArch64::SQSHRUNB_ZZI_H, Convert__SVEVectorHReg1_0__SVEVectorSReg1_1__Imm1_161_2, AMFBS_HasSVE2, { MCK_SVEVectorHReg, MCK_SVEVectorSReg, MCK_Imm1_16 }, }, 26985 { 6625 /* uqrshrnb */, AArch64::UQRSHRNB_ZZI_H, Convert__SVEVectorHReg1_0__SVEVectorSReg1_1__Imm1_161_2, AMFBS_HasSVE2, { MCK_SVEVectorHReg, MCK_SVEVectorSReg, MCK_Imm1_16 }, }, 27034 { 6671 /* uqshrnb */, AArch64::UQSHRNB_ZZI_H, Convert__SVEVectorHReg1_0__SVEVectorSReg1_1__Imm1_161_2, AMFBS_HasSVE2, { MCK_SVEVectorHReg, MCK_SVEVectorSReg, MCK_Imm1_16 }, },