reference, declaration → definition definition → references, declarations, derived classes, virtual overrides reference to multiple definitions → definitions unreferenced |
14112 { 1364 /* fmad */, AArch64::FMAD_ZPmZZ_H, Convert__SVEVectorHReg1_0__SVEPredicate3bAnyReg1_1__Tie0_1_1__SVEVectorHReg1_4__SVEVectorHReg1_5, AMFBS_HasSVE, { MCK_SVEVectorHReg, MCK_SVEPredicate3bAnyReg, MCK__47_, MCK_m, MCK_SVEVectorHReg, MCK_SVEVectorHReg }, }, 14253 { 1455 /* fmla */, AArch64::FMLA_ZPmZZ_H, Convert__SVEVectorHReg1_0__SVEPredicate3bAnyReg1_1__Tie0_1_1__SVEVectorHReg1_4__SVEVectorHReg1_5, AMFBS_HasSVE, { MCK_SVEVectorHReg, MCK_SVEPredicate3bAnyReg, MCK__47_, MCK_m, MCK_SVEVectorHReg, MCK_SVEVectorHReg }, }, 14284 { 1487 /* fmls */, AArch64::FMLS_ZPmZZ_H, Convert__SVEVectorHReg1_0__SVEPredicate3bAnyReg1_1__Tie0_1_1__SVEVectorHReg1_4__SVEVectorHReg1_5, AMFBS_HasSVE, { MCK_SVEVectorHReg, MCK_SVEPredicate3bAnyReg, MCK__47_, MCK_m, MCK_SVEVectorHReg, MCK_SVEVectorHReg }, }, 14340 { 1524 /* fmsb */, AArch64::FMSB_ZPmZZ_H, Convert__SVEVectorHReg1_0__SVEPredicate3bAnyReg1_1__Tie0_1_1__SVEVectorHReg1_4__SVEVectorHReg1_5, AMFBS_HasSVE, { MCK_SVEVectorHReg, MCK_SVEPredicate3bAnyReg, MCK__47_, MCK_m, MCK_SVEVectorHReg, MCK_SVEVectorHReg }, }, 14404 { 1551 /* fnmad */, AArch64::FNMAD_ZPmZZ_H, Convert__SVEVectorHReg1_0__SVEPredicate3bAnyReg1_1__Tie0_1_1__SVEVectorHReg1_4__SVEVectorHReg1_5, AMFBS_HasSVE, { MCK_SVEVectorHReg, MCK_SVEPredicate3bAnyReg, MCK__47_, MCK_m, MCK_SVEVectorHReg, MCK_SVEVectorHReg }, }, 14410 { 1564 /* fnmla */, AArch64::FNMLA_ZPmZZ_H, Convert__SVEVectorHReg1_0__SVEPredicate3bAnyReg1_1__Tie0_1_1__SVEVectorHReg1_4__SVEVectorHReg1_5, AMFBS_HasSVE, { MCK_SVEVectorHReg, MCK_SVEPredicate3bAnyReg, MCK__47_, MCK_m, MCK_SVEVectorHReg, MCK_SVEVectorHReg }, }, 14413 { 1570 /* fnmls */, AArch64::FNMLS_ZPmZZ_H, Convert__SVEVectorHReg1_0__SVEPredicate3bAnyReg1_1__Tie0_1_1__SVEVectorHReg1_4__SVEVectorHReg1_5, AMFBS_HasSVE, { MCK_SVEVectorHReg, MCK_SVEPredicate3bAnyReg, MCK__47_, MCK_m, MCK_SVEVectorHReg, MCK_SVEVectorHReg }, }, 14416 { 1576 /* fnmsb */, AArch64::FNMSB_ZPmZZ_H, Convert__SVEVectorHReg1_0__SVEPredicate3bAnyReg1_1__Tie0_1_1__SVEVectorHReg1_4__SVEVectorHReg1_5, AMFBS_HasSVE, { MCK_SVEVectorHReg, MCK_SVEPredicate3bAnyReg, MCK__47_, MCK_m, MCK_SVEVectorHReg, MCK_SVEVectorHReg }, }, 16473 { 3328 /* mad */, AArch64::MAD_ZPmZZ_H, Convert__SVEVectorHReg1_0__SVEPredicate3bAnyReg1_1__Tie0_1_1__SVEVectorHReg1_4__SVEVectorHReg1_5, AMFBS_HasSVE, { MCK_SVEVectorHReg, MCK_SVEPredicate3bAnyReg, MCK__47_, MCK_m, MCK_SVEVectorHReg, MCK_SVEVectorHReg }, }, 16490 { 3343 /* mla */, AArch64::MLA_ZPmZZ_H, Convert__SVEVectorHReg1_0__SVEPredicate3bAnyReg1_1__Tie0_1_1__SVEVectorHReg1_4__SVEVectorHReg1_5, AMFBS_HasSVE, { MCK_SVEVectorHReg, MCK_SVEPredicate3bAnyReg, MCK__47_, MCK_m, MCK_SVEVectorHReg, MCK_SVEVectorHReg }, }, 16507 { 3347 /* mls */, AArch64::MLS_ZPmZZ_H, Convert__SVEVectorHReg1_0__SVEPredicate3bAnyReg1_1__Tie0_1_1__SVEVectorHReg1_4__SVEVectorHReg1_5, AMFBS_HasSVE, { MCK_SVEVectorHReg, MCK_SVEPredicate3bAnyReg, MCK__47_, MCK_m, MCK_SVEVectorHReg, MCK_SVEVectorHReg }, }, 16664 { 3397 /* msb */, AArch64::MSB_ZPmZZ_H, Convert__SVEVectorHReg1_0__SVEPredicate3bAnyReg1_1__Tie0_1_1__SVEVectorHReg1_4__SVEVectorHReg1_5, AMFBS_HasSVE, { MCK_SVEVectorHReg, MCK_SVEPredicate3bAnyReg, MCK__47_, MCK_m, MCK_SVEVectorHReg, MCK_SVEVectorHReg }, }, 21470 { 1364 /* fmad */, AArch64::FMAD_ZPmZZ_H, Convert__SVEVectorHReg1_0__SVEPredicate3bAnyReg1_1__Tie0_1_1__SVEVectorHReg1_4__SVEVectorHReg1_5, AMFBS_HasSVE, { MCK_SVEVectorHReg, MCK_SVEPredicate3bAnyReg, MCK__47_, MCK_m, MCK_SVEVectorHReg, MCK_SVEVectorHReg }, }, 21616 { 1455 /* fmla */, AArch64::FMLA_ZPmZZ_H, Convert__SVEVectorHReg1_0__SVEPredicate3bAnyReg1_1__Tie0_1_1__SVEVectorHReg1_4__SVEVectorHReg1_5, AMFBS_HasSVE, { MCK_SVEVectorHReg, MCK_SVEPredicate3bAnyReg, MCK__47_, MCK_m, MCK_SVEVectorHReg, MCK_SVEVectorHReg }, }, 21647 { 1487 /* fmls */, AArch64::FMLS_ZPmZZ_H, Convert__SVEVectorHReg1_0__SVEPredicate3bAnyReg1_1__Tie0_1_1__SVEVectorHReg1_4__SVEVectorHReg1_5, AMFBS_HasSVE, { MCK_SVEVectorHReg, MCK_SVEPredicate3bAnyReg, MCK__47_, MCK_m, MCK_SVEVectorHReg, MCK_SVEVectorHReg }, }, 21698 { 1524 /* fmsb */, AArch64::FMSB_ZPmZZ_H, Convert__SVEVectorHReg1_0__SVEPredicate3bAnyReg1_1__Tie0_1_1__SVEVectorHReg1_4__SVEVectorHReg1_5, AMFBS_HasSVE, { MCK_SVEVectorHReg, MCK_SVEPredicate3bAnyReg, MCK__47_, MCK_m, MCK_SVEVectorHReg, MCK_SVEVectorHReg }, }, 21762 { 1551 /* fnmad */, AArch64::FNMAD_ZPmZZ_H, Convert__SVEVectorHReg1_0__SVEPredicate3bAnyReg1_1__Tie0_1_1__SVEVectorHReg1_4__SVEVectorHReg1_5, AMFBS_HasSVE, { MCK_SVEVectorHReg, MCK_SVEPredicate3bAnyReg, MCK__47_, MCK_m, MCK_SVEVectorHReg, MCK_SVEVectorHReg }, }, 21768 { 1564 /* fnmla */, AArch64::FNMLA_ZPmZZ_H, Convert__SVEVectorHReg1_0__SVEPredicate3bAnyReg1_1__Tie0_1_1__SVEVectorHReg1_4__SVEVectorHReg1_5, AMFBS_HasSVE, { MCK_SVEVectorHReg, MCK_SVEPredicate3bAnyReg, MCK__47_, MCK_m, MCK_SVEVectorHReg, MCK_SVEVectorHReg }, }, 21771 { 1570 /* fnmls */, AArch64::FNMLS_ZPmZZ_H, Convert__SVEVectorHReg1_0__SVEPredicate3bAnyReg1_1__Tie0_1_1__SVEVectorHReg1_4__SVEVectorHReg1_5, AMFBS_HasSVE, { MCK_SVEVectorHReg, MCK_SVEPredicate3bAnyReg, MCK__47_, MCK_m, MCK_SVEVectorHReg, MCK_SVEVectorHReg }, }, 21774 { 1576 /* fnmsb */, AArch64::FNMSB_ZPmZZ_H, Convert__SVEVectorHReg1_0__SVEPredicate3bAnyReg1_1__Tie0_1_1__SVEVectorHReg1_4__SVEVectorHReg1_5, AMFBS_HasSVE, { MCK_SVEVectorHReg, MCK_SVEPredicate3bAnyReg, MCK__47_, MCK_m, MCK_SVEVectorHReg, MCK_SVEVectorHReg }, }, 23831 { 3328 /* mad */, AArch64::MAD_ZPmZZ_H, Convert__SVEVectorHReg1_0__SVEPredicate3bAnyReg1_1__Tie0_1_1__SVEVectorHReg1_4__SVEVectorHReg1_5, AMFBS_HasSVE, { MCK_SVEVectorHReg, MCK_SVEPredicate3bAnyReg, MCK__47_, MCK_m, MCK_SVEVectorHReg, MCK_SVEVectorHReg }, }, 23852 { 3343 /* mla */, AArch64::MLA_ZPmZZ_H, Convert__SVEVectorHReg1_0__SVEPredicate3bAnyReg1_1__Tie0_1_1__SVEVectorHReg1_4__SVEVectorHReg1_5, AMFBS_HasSVE, { MCK_SVEVectorHReg, MCK_SVEPredicate3bAnyReg, MCK__47_, MCK_m, MCK_SVEVectorHReg, MCK_SVEVectorHReg }, }, 23869 { 3347 /* mls */, AArch64::MLS_ZPmZZ_H, Convert__SVEVectorHReg1_0__SVEPredicate3bAnyReg1_1__Tie0_1_1__SVEVectorHReg1_4__SVEVectorHReg1_5, AMFBS_HasSVE, { MCK_SVEVectorHReg, MCK_SVEPredicate3bAnyReg, MCK__47_, MCK_m, MCK_SVEVectorHReg, MCK_SVEVectorHReg }, }, 24022 { 3397 /* msb */, AArch64::MSB_ZPmZZ_H, Convert__SVEVectorHReg1_0__SVEPredicate3bAnyReg1_1__Tie0_1_1__SVEVectorHReg1_4__SVEVectorHReg1_5, AMFBS_HasSVE, { MCK_SVEVectorHReg, MCK_SVEPredicate3bAnyReg, MCK__47_, MCK_m, MCK_SVEVectorHReg, MCK_SVEVectorHReg }, },