reference, declaration → definition definition → references, declarations, derived classes, virtual overrides reference to multiple definitions → definitions unreferenced |
12699 { 8 /* adclb */, AArch64::ADCLB_ZZZ_D, Convert__SVEVectorDReg1_0__Tie0_1_1__SVEVectorDReg1_1__SVEVectorDReg1_2, AMFBS_HasSVE2, { MCK_SVEVectorDReg, MCK_SVEVectorDReg, MCK_SVEVectorDReg }, }, 12701 { 14 /* adclt */, AArch64::ADCLT_ZZZ_D, Convert__SVEVectorDReg1_0__Tie0_1_1__SVEVectorDReg1_1__SVEVectorDReg1_2, AMFBS_HasSVE2, { MCK_SVEVectorDReg, MCK_SVEVectorDReg, MCK_SVEVectorDReg }, }, 13531 { 984 /* eorbt */, AArch64::EORBT_ZZZ_D, Convert__SVEVectorDReg1_0__Tie0_1_1__SVEVectorDReg1_1__SVEVectorDReg1_2, AMFBS_HasSVE2, { MCK_SVEVectorDReg, MCK_SVEVectorDReg, MCK_SVEVectorDReg }, }, 13536 { 995 /* eortb */, AArch64::EORTB_ZZZ_D, Convert__SVEVectorDReg1_0__Tie0_1_1__SVEVectorDReg1_1__SVEVectorDReg1_2, AMFBS_HasSVE2, { MCK_SVEVectorDReg, MCK_SVEVectorDReg, MCK_SVEVectorDReg }, }, 17018 { 3928 /* saba */, AArch64::SABA_ZZZ_D, Convert__SVEVectorDReg1_0__Tie0_1_1__SVEVectorDReg1_1__SVEVectorDReg1_2, AMFBS_HasSVE2, { MCK_SVEVectorDReg, MCK_SVEVectorDReg, MCK_SVEVectorDReg }, }, 17114 { 4088 /* sbclb */, AArch64::SBCLB_ZZZ_D, Convert__SVEVectorDReg1_0__Tie0_1_1__SVEVectorDReg1_1__SVEVectorDReg1_2, AMFBS_HasSVE2, { MCK_SVEVectorDReg, MCK_SVEVectorDReg, MCK_SVEVectorDReg }, }, 17116 { 4094 /* sbclt */, AArch64::SBCLT_ZZZ_D, Convert__SVEVectorDReg1_0__Tie0_1_1__SVEVectorDReg1_1__SVEVectorDReg1_2, AMFBS_HasSVE2, { MCK_SVEVectorDReg, MCK_SVEVectorDReg, MCK_SVEVectorDReg }, }, 17672 { 4808 /* sqrdmlah */, AArch64::SQRDMLAH_ZZZ_D, Convert__SVEVectorDReg1_0__Tie0_1_1__SVEVectorDReg1_1__SVEVectorDReg1_2, AMFBS_HasSVE2, { MCK_SVEVectorDReg, MCK_SVEVectorDReg, MCK_SVEVectorDReg }, }, 17691 { 4817 /* sqrdmlsh */, AArch64::SQRDMLSH_ZZZ_D, Convert__SVEVectorDReg1_0__Tie0_1_1__SVEVectorDReg1_1__SVEVectorDReg1_2, AMFBS_HasSVE2, { MCK_SVEVectorDReg, MCK_SVEVectorDReg, MCK_SVEVectorDReg }, }, 19109 { 6120 /* tbx */, AArch64::TBX_ZZZ_D, Convert__SVEVectorDReg1_0__Tie0_1_1__SVEVectorDReg1_1__SVEVectorDReg1_2, AMFBS_HasSVE2, { MCK_SVEVectorDReg, MCK_SVEVectorDReg, MCK_SVEVectorDReg }, }, 19173 { 6175 /* uaba */, AArch64::UABA_ZZZ_D, Convert__SVEVectorDReg1_0__Tie0_1_1__SVEVectorDReg1_1__SVEVectorDReg1_2, AMFBS_HasSVE2, { MCK_SVEVectorDReg, MCK_SVEVectorDReg, MCK_SVEVectorDReg }, }, 20057 { 8 /* adclb */, AArch64::ADCLB_ZZZ_D, Convert__SVEVectorDReg1_0__Tie0_1_1__SVEVectorDReg1_1__SVEVectorDReg1_2, AMFBS_HasSVE2, { MCK_SVEVectorDReg, MCK_SVEVectorDReg, MCK_SVEVectorDReg }, }, 20059 { 14 /* adclt */, AArch64::ADCLT_ZZZ_D, Convert__SVEVectorDReg1_0__Tie0_1_1__SVEVectorDReg1_1__SVEVectorDReg1_2, AMFBS_HasSVE2, { MCK_SVEVectorDReg, MCK_SVEVectorDReg, MCK_SVEVectorDReg }, }, 20889 { 984 /* eorbt */, AArch64::EORBT_ZZZ_D, Convert__SVEVectorDReg1_0__Tie0_1_1__SVEVectorDReg1_1__SVEVectorDReg1_2, AMFBS_HasSVE2, { MCK_SVEVectorDReg, MCK_SVEVectorDReg, MCK_SVEVectorDReg }, }, 20894 { 995 /* eortb */, AArch64::EORTB_ZZZ_D, Convert__SVEVectorDReg1_0__Tie0_1_1__SVEVectorDReg1_1__SVEVectorDReg1_2, AMFBS_HasSVE2, { MCK_SVEVectorDReg, MCK_SVEVectorDReg, MCK_SVEVectorDReg }, }, 24376 { 3928 /* saba */, AArch64::SABA_ZZZ_D, Convert__SVEVectorDReg1_0__Tie0_1_1__SVEVectorDReg1_1__SVEVectorDReg1_2, AMFBS_HasSVE2, { MCK_SVEVectorDReg, MCK_SVEVectorDReg, MCK_SVEVectorDReg }, }, 24472 { 4088 /* sbclb */, AArch64::SBCLB_ZZZ_D, Convert__SVEVectorDReg1_0__Tie0_1_1__SVEVectorDReg1_1__SVEVectorDReg1_2, AMFBS_HasSVE2, { MCK_SVEVectorDReg, MCK_SVEVectorDReg, MCK_SVEVectorDReg }, }, 24474 { 4094 /* sbclt */, AArch64::SBCLT_ZZZ_D, Convert__SVEVectorDReg1_0__Tie0_1_1__SVEVectorDReg1_1__SVEVectorDReg1_2, AMFBS_HasSVE2, { MCK_SVEVectorDReg, MCK_SVEVectorDReg, MCK_SVEVectorDReg }, }, 25030 { 4808 /* sqrdmlah */, AArch64::SQRDMLAH_ZZZ_D, Convert__SVEVectorDReg1_0__Tie0_1_1__SVEVectorDReg1_1__SVEVectorDReg1_2, AMFBS_HasSVE2, { MCK_SVEVectorDReg, MCK_SVEVectorDReg, MCK_SVEVectorDReg }, }, 25049 { 4817 /* sqrdmlsh */, AArch64::SQRDMLSH_ZZZ_D, Convert__SVEVectorDReg1_0__Tie0_1_1__SVEVectorDReg1_1__SVEVectorDReg1_2, AMFBS_HasSVE2, { MCK_SVEVectorDReg, MCK_SVEVectorDReg, MCK_SVEVectorDReg }, }, 26467 { 6120 /* tbx */, AArch64::TBX_ZZZ_D, Convert__SVEVectorDReg1_0__Tie0_1_1__SVEVectorDReg1_1__SVEVectorDReg1_2, AMFBS_HasSVE2, { MCK_SVEVectorDReg, MCK_SVEVectorDReg, MCK_SVEVectorDReg }, }, 26531 { 6175 /* uaba */, AArch64::UABA_ZZZ_D, Convert__SVEVectorDReg1_0__Tie0_1_1__SVEVectorDReg1_1__SVEVectorDReg1_2, AMFBS_HasSVE2, { MCK_SVEVectorDReg, MCK_SVEVectorDReg, MCK_SVEVectorDReg }, },