reference, declaration → definition definition → references, declarations, derived classes, virtual overrides reference to multiple definitions → definitions unreferenced |
17106 { 4067 /* saddwb */, AArch64::SADDWB_ZZZ_D, Convert__SVEVectorDReg1_0__SVEVectorDReg1_1__SVEVectorSReg1_2, AMFBS_HasSVE2, { MCK_SVEVectorDReg, MCK_SVEVectorDReg, MCK_SVEVectorSReg }, }, 17109 { 4074 /* saddwt */, AArch64::SADDWT_ZZZ_D, Convert__SVEVectorDReg1_0__SVEVectorDReg1_1__SVEVectorSReg1_2, AMFBS_HasSVE2, { MCK_SVEVectorDReg, MCK_SVEVectorDReg, MCK_SVEVectorSReg }, }, 18039 { 5220 /* ssubwb */, AArch64::SSUBWB_ZZZ_D, Convert__SVEVectorDReg1_0__SVEVectorDReg1_1__SVEVectorSReg1_2, AMFBS_HasSVE2, { MCK_SVEVectorDReg, MCK_SVEVectorDReg, MCK_SVEVectorSReg }, }, 18042 { 5227 /* ssubwt */, AArch64::SSUBWT_ZZZ_D, Convert__SVEVectorDReg1_0__SVEVectorDReg1_1__SVEVectorSReg1_2, AMFBS_HasSVE2, { MCK_SVEVectorDReg, MCK_SVEVectorDReg, MCK_SVEVectorSReg }, }, 19259 { 6306 /* uaddwb */, AArch64::UADDWB_ZZZ_D, Convert__SVEVectorDReg1_0__SVEVectorDReg1_1__SVEVectorSReg1_2, AMFBS_HasSVE2, { MCK_SVEVectorDReg, MCK_SVEVectorDReg, MCK_SVEVectorSReg }, }, 19262 { 6313 /* uaddwt */, AArch64::UADDWT_ZZZ_D, Convert__SVEVectorDReg1_0__SVEVectorDReg1_1__SVEVectorSReg1_2, AMFBS_HasSVE2, { MCK_SVEVectorDReg, MCK_SVEVectorDReg, MCK_SVEVectorSReg }, }, 19855 { 6863 /* usubwb */, AArch64::USUBWB_ZZZ_D, Convert__SVEVectorDReg1_0__SVEVectorDReg1_1__SVEVectorSReg1_2, AMFBS_HasSVE2, { MCK_SVEVectorDReg, MCK_SVEVectorDReg, MCK_SVEVectorSReg }, }, 19858 { 6870 /* usubwt */, AArch64::USUBWT_ZZZ_D, Convert__SVEVectorDReg1_0__SVEVectorDReg1_1__SVEVectorSReg1_2, AMFBS_HasSVE2, { MCK_SVEVectorDReg, MCK_SVEVectorDReg, MCK_SVEVectorSReg }, }, 24464 { 4067 /* saddwb */, AArch64::SADDWB_ZZZ_D, Convert__SVEVectorDReg1_0__SVEVectorDReg1_1__SVEVectorSReg1_2, AMFBS_HasSVE2, { MCK_SVEVectorDReg, MCK_SVEVectorDReg, MCK_SVEVectorSReg }, }, 24467 { 4074 /* saddwt */, AArch64::SADDWT_ZZZ_D, Convert__SVEVectorDReg1_0__SVEVectorDReg1_1__SVEVectorSReg1_2, AMFBS_HasSVE2, { MCK_SVEVectorDReg, MCK_SVEVectorDReg, MCK_SVEVectorSReg }, }, 25397 { 5220 /* ssubwb */, AArch64::SSUBWB_ZZZ_D, Convert__SVEVectorDReg1_0__SVEVectorDReg1_1__SVEVectorSReg1_2, AMFBS_HasSVE2, { MCK_SVEVectorDReg, MCK_SVEVectorDReg, MCK_SVEVectorSReg }, }, 25400 { 5227 /* ssubwt */, AArch64::SSUBWT_ZZZ_D, Convert__SVEVectorDReg1_0__SVEVectorDReg1_1__SVEVectorSReg1_2, AMFBS_HasSVE2, { MCK_SVEVectorDReg, MCK_SVEVectorDReg, MCK_SVEVectorSReg }, }, 26617 { 6306 /* uaddwb */, AArch64::UADDWB_ZZZ_D, Convert__SVEVectorDReg1_0__SVEVectorDReg1_1__SVEVectorSReg1_2, AMFBS_HasSVE2, { MCK_SVEVectorDReg, MCK_SVEVectorDReg, MCK_SVEVectorSReg }, }, 26620 { 6313 /* uaddwt */, AArch64::UADDWT_ZZZ_D, Convert__SVEVectorDReg1_0__SVEVectorDReg1_1__SVEVectorSReg1_2, AMFBS_HasSVE2, { MCK_SVEVectorDReg, MCK_SVEVectorDReg, MCK_SVEVectorSReg }, }, 27213 { 6863 /* usubwb */, AArch64::USUBWB_ZZZ_D, Convert__SVEVectorDReg1_0__SVEVectorDReg1_1__SVEVectorSReg1_2, AMFBS_HasSVE2, { MCK_SVEVectorDReg, MCK_SVEVectorDReg, MCK_SVEVectorSReg }, }, 27216 { 6870 /* usubwt */, AArch64::USUBWT_ZZZ_D, Convert__SVEVectorDReg1_0__SVEVectorDReg1_1__SVEVectorSReg1_2, AMFBS_HasSVE2, { MCK_SVEVectorDReg, MCK_SVEVectorDReg, MCK_SVEVectorSReg }, },