reference, declarationdefinition
definition → references, declarations, derived classes, virtual overrides
reference to multiple definitions → definitions
unreferenced

References

gen/lib/Target/AArch64/AArch64GenAsmMatcher.inc
16434   { 3300 /* lsl */, AArch64::LSL_ZPmI_D, Convert__SVEVectorDReg1_0__SVEPredicate3bAnyReg1_1__Tie0_1_5__Imm0_631_5, AMFBS_HasSVE, { MCK_SVEVectorDReg, MCK_SVEPredicate3bAnyReg, MCK__47_, MCK_m, MCK_SVEVectorDReg, MCK_Imm0_63 }, },
17800   { 4924 /* sqshl */, AArch64::SQSHL_ZPmI_D, Convert__SVEVectorDReg1_0__SVEPredicate3bAnyReg1_1__Tie0_1_5__Imm0_631_5, AMFBS_HasSVE2, { MCK_SVEVectorDReg, MCK_SVEPredicate3bAnyReg, MCK__47_, MCK_m, MCK_SVEVectorDReg, MCK_Imm0_63 }, },
17821   { 4937 /* sqshlu */, AArch64::SQSHLU_ZPmI_D, Convert__SVEVectorDReg1_0__SVEPredicate3bAnyReg1_1__Tie0_1_5__Imm0_631_5, AMFBS_HasSVE2, { MCK_SVEVectorDReg, MCK_SVEPredicate3bAnyReg, MCK__47_, MCK_m, MCK_SVEVectorDReg, MCK_Imm0_63 }, },
19659   { 6643 /* uqshl */, AArch64::UQSHL_ZPmI_D, Convert__SVEVectorDReg1_0__SVEPredicate3bAnyReg1_1__Tie0_1_5__Imm0_631_5, AMFBS_HasSVE2, { MCK_SVEVectorDReg, MCK_SVEPredicate3bAnyReg, MCK__47_, MCK_m, MCK_SVEVectorDReg, MCK_Imm0_63 }, },
23792   { 3300 /* lsl */, AArch64::LSL_ZPmI_D, Convert__SVEVectorDReg1_0__SVEPredicate3bAnyReg1_1__Tie0_1_5__Imm0_631_5, AMFBS_HasSVE, { MCK_SVEVectorDReg, MCK_SVEPredicate3bAnyReg, MCK__47_, MCK_m, MCK_SVEVectorDReg, MCK_Imm0_63 }, },
25158   { 4924 /* sqshl */, AArch64::SQSHL_ZPmI_D, Convert__SVEVectorDReg1_0__SVEPredicate3bAnyReg1_1__Tie0_1_5__Imm0_631_5, AMFBS_HasSVE2, { MCK_SVEVectorDReg, MCK_SVEPredicate3bAnyReg, MCK__47_, MCK_m, MCK_SVEVectorDReg, MCK_Imm0_63 }, },
25179   { 4937 /* sqshlu */, AArch64::SQSHLU_ZPmI_D, Convert__SVEVectorDReg1_0__SVEPredicate3bAnyReg1_1__Tie0_1_5__Imm0_631_5, AMFBS_HasSVE2, { MCK_SVEVectorDReg, MCK_SVEPredicate3bAnyReg, MCK__47_, MCK_m, MCK_SVEVectorDReg, MCK_Imm0_63 }, },
27017   { 6643 /* uqshl */, AArch64::UQSHL_ZPmI_D, Convert__SVEVectorDReg1_0__SVEPredicate3bAnyReg1_1__Tie0_1_5__Imm0_631_5, AMFBS_HasSVE2, { MCK_SVEVectorDReg, MCK_SVEPredicate3bAnyReg, MCK__47_, MCK_m, MCK_SVEVectorDReg, MCK_Imm0_63 }, },