reference, declaration → definition definition → references, declarations, derived classes, virtual overrides reference to multiple definitions → definitions unreferenced |
14974 { 1863 /* ld1d */, AArch64::GLD1D_SXTW_REAL, Convert__SVEVectorDReg1_0__SVEPredicate3bAnyReg1_1__Reg1_5__ZPRExtendSXTW6481_6, AMFBS_HasSVE, { MCK_SVEVectorDReg, MCK_SVEPredicate3bAnyReg, MCK__47_, MCK_z, MCK__91_, MCK_GPR64sp, MCK_ZPRExtendSXTW648, MCK__93_ }, }, 15009 { 1868 /* ld1h */, AArch64::GLD1H_D_SXTW_REAL, Convert__SVEVectorDReg1_0__SVEPredicate3bAnyReg1_1__Reg1_5__ZPRExtendSXTW6481_6, AMFBS_HasSVE, { MCK_SVEVectorDReg, MCK_SVEPredicate3bAnyReg, MCK__47_, MCK_z, MCK__91_, MCK_GPR64sp, MCK_ZPRExtendSXTW648, MCK__93_ }, }, 15224 { 1957 /* ld1sh */, AArch64::GLD1SH_D_SXTW_REAL, Convert__SVEVectorDReg1_0__SVEPredicate3bAnyReg1_1__Reg1_5__ZPRExtendSXTW6481_6, AMFBS_HasSVE, { MCK_SVEVectorDReg, MCK_SVEPredicate3bAnyReg, MCK__47_, MCK_z, MCK__91_, MCK_GPR64sp, MCK_ZPRExtendSXTW648, MCK__93_ }, }, 15254 { 1963 /* ld1sw */, AArch64::GLD1SW_D_SXTW_REAL, Convert__SVEVectorDReg1_0__SVEPredicate3bAnyReg1_1__Reg1_5__ZPRExtendSXTW6481_6, AMFBS_HasSVE, { MCK_SVEVectorDReg, MCK_SVEPredicate3bAnyReg, MCK__47_, MCK_z, MCK__91_, MCK_GPR64sp, MCK_ZPRExtendSXTW648, MCK__93_ }, }, 15286 { 1969 /* ld1w */, AArch64::GLD1W_D_SXTW_REAL, Convert__SVEVectorDReg1_0__SVEPredicate3bAnyReg1_1__Reg1_5__ZPRExtendSXTW6481_6, AMFBS_HasSVE, { MCK_SVEVectorDReg, MCK_SVEPredicate3bAnyReg, MCK__47_, MCK_z, MCK__91_, MCK_GPR64sp, MCK_ZPRExtendSXTW648, MCK__93_ }, }, 15808 { 2457 /* ldff1d */, AArch64::GLDFF1D_SXTW_REAL, Convert__SVEVectorDReg1_0__SVEPredicate3bAnyReg1_1__Reg1_5__ZPRExtendSXTW6481_6, AMFBS_HasSVE, { MCK_SVEVectorDReg, MCK_SVEPredicate3bAnyReg, MCK__47_, MCK_z, MCK__91_, MCK_GPR64sp, MCK_ZPRExtendSXTW648, MCK__93_ }, }, 15841 { 2464 /* ldff1h */, AArch64::GLDFF1H_D_SXTW_REAL, Convert__SVEVectorDReg1_0__SVEPredicate3bAnyReg1_1__Reg1_5__ZPRExtendSXTW6481_6, AMFBS_HasSVE, { MCK_SVEVectorDReg, MCK_SVEPredicate3bAnyReg, MCK__47_, MCK_z, MCK__91_, MCK_GPR64sp, MCK_ZPRExtendSXTW648, MCK__93_ }, }, 15908 { 2479 /* ldff1sh */, AArch64::GLDFF1SH_D_SXTW_REAL, Convert__SVEVectorDReg1_0__SVEPredicate3bAnyReg1_1__Reg1_5__ZPRExtendSXTW6481_6, AMFBS_HasSVE, { MCK_SVEVectorDReg, MCK_SVEPredicate3bAnyReg, MCK__47_, MCK_z, MCK__91_, MCK_GPR64sp, MCK_ZPRExtendSXTW648, MCK__93_ }, }, 15934 { 2487 /* ldff1sw */, AArch64::GLDFF1SW_D_SXTW_REAL, Convert__SVEVectorDReg1_0__SVEPredicate3bAnyReg1_1__Reg1_5__ZPRExtendSXTW6481_6, AMFBS_HasSVE, { MCK_SVEVectorDReg, MCK_SVEPredicate3bAnyReg, MCK__47_, MCK_z, MCK__91_, MCK_GPR64sp, MCK_ZPRExtendSXTW648, MCK__93_ }, }, 15964 { 2495 /* ldff1w */, AArch64::GLDFF1W_D_SXTW_REAL, Convert__SVEVectorDReg1_0__SVEPredicate3bAnyReg1_1__Reg1_5__ZPRExtendSXTW6481_6, AMFBS_HasSVE, { MCK_SVEVectorDReg, MCK_SVEPredicate3bAnyReg, MCK__47_, MCK_z, MCK__91_, MCK_GPR64sp, MCK_ZPRExtendSXTW648, MCK__93_ }, }, 22332 { 1863 /* ld1d */, AArch64::GLD1D_SXTW_REAL, Convert__SVEVectorDReg1_0__SVEPredicate3bAnyReg1_1__Reg1_5__ZPRExtendSXTW6481_6, AMFBS_HasSVE, { MCK_SVEVectorDReg, MCK_SVEPredicate3bAnyReg, MCK__47_, MCK_z, MCK__91_, MCK_GPR64sp, MCK_ZPRExtendSXTW648, MCK__93_ }, }, 22367 { 1868 /* ld1h */, AArch64::GLD1H_D_SXTW_REAL, Convert__SVEVectorDReg1_0__SVEPredicate3bAnyReg1_1__Reg1_5__ZPRExtendSXTW6481_6, AMFBS_HasSVE, { MCK_SVEVectorDReg, MCK_SVEPredicate3bAnyReg, MCK__47_, MCK_z, MCK__91_, MCK_GPR64sp, MCK_ZPRExtendSXTW648, MCK__93_ }, }, 22582 { 1957 /* ld1sh */, AArch64::GLD1SH_D_SXTW_REAL, Convert__SVEVectorDReg1_0__SVEPredicate3bAnyReg1_1__Reg1_5__ZPRExtendSXTW6481_6, AMFBS_HasSVE, { MCK_SVEVectorDReg, MCK_SVEPredicate3bAnyReg, MCK__47_, MCK_z, MCK__91_, MCK_GPR64sp, MCK_ZPRExtendSXTW648, MCK__93_ }, }, 22612 { 1963 /* ld1sw */, AArch64::GLD1SW_D_SXTW_REAL, Convert__SVEVectorDReg1_0__SVEPredicate3bAnyReg1_1__Reg1_5__ZPRExtendSXTW6481_6, AMFBS_HasSVE, { MCK_SVEVectorDReg, MCK_SVEPredicate3bAnyReg, MCK__47_, MCK_z, MCK__91_, MCK_GPR64sp, MCK_ZPRExtendSXTW648, MCK__93_ }, }, 22644 { 1969 /* ld1w */, AArch64::GLD1W_D_SXTW_REAL, Convert__SVEVectorDReg1_0__SVEPredicate3bAnyReg1_1__Reg1_5__ZPRExtendSXTW6481_6, AMFBS_HasSVE, { MCK_SVEVectorDReg, MCK_SVEPredicate3bAnyReg, MCK__47_, MCK_z, MCK__91_, MCK_GPR64sp, MCK_ZPRExtendSXTW648, MCK__93_ }, }, 23166 { 2457 /* ldff1d */, AArch64::GLDFF1D_SXTW_REAL, Convert__SVEVectorDReg1_0__SVEPredicate3bAnyReg1_1__Reg1_5__ZPRExtendSXTW6481_6, AMFBS_HasSVE, { MCK_SVEVectorDReg, MCK_SVEPredicate3bAnyReg, MCK__47_, MCK_z, MCK__91_, MCK_GPR64sp, MCK_ZPRExtendSXTW648, MCK__93_ }, }, 23199 { 2464 /* ldff1h */, AArch64::GLDFF1H_D_SXTW_REAL, Convert__SVEVectorDReg1_0__SVEPredicate3bAnyReg1_1__Reg1_5__ZPRExtendSXTW6481_6, AMFBS_HasSVE, { MCK_SVEVectorDReg, MCK_SVEPredicate3bAnyReg, MCK__47_, MCK_z, MCK__91_, MCK_GPR64sp, MCK_ZPRExtendSXTW648, MCK__93_ }, }, 23266 { 2479 /* ldff1sh */, AArch64::GLDFF1SH_D_SXTW_REAL, Convert__SVEVectorDReg1_0__SVEPredicate3bAnyReg1_1__Reg1_5__ZPRExtendSXTW6481_6, AMFBS_HasSVE, { MCK_SVEVectorDReg, MCK_SVEPredicate3bAnyReg, MCK__47_, MCK_z, MCK__91_, MCK_GPR64sp, MCK_ZPRExtendSXTW648, MCK__93_ }, }, 23292 { 2487 /* ldff1sw */, AArch64::GLDFF1SW_D_SXTW_REAL, Convert__SVEVectorDReg1_0__SVEPredicate3bAnyReg1_1__Reg1_5__ZPRExtendSXTW6481_6, AMFBS_HasSVE, { MCK_SVEVectorDReg, MCK_SVEPredicate3bAnyReg, MCK__47_, MCK_z, MCK__91_, MCK_GPR64sp, MCK_ZPRExtendSXTW648, MCK__93_ }, }, 23322 { 2495 /* ldff1w */, AArch64::GLDFF1W_D_SXTW_REAL, Convert__SVEVectorDReg1_0__SVEPredicate3bAnyReg1_1__Reg1_5__ZPRExtendSXTW6481_6, AMFBS_HasSVE, { MCK_SVEVectorDReg, MCK_SVEPredicate3bAnyReg, MCK__47_, MCK_z, MCK__91_, MCK_GPR64sp, MCK_ZPRExtendSXTW648, MCK__93_ }, },