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reference, declaration → definition
definition → references, declarations, derived classes, virtual overrides
reference to multiple definitions → definitions
unreferenced
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References
gen/lib/Target/AArch64/AArch64GenAsmMatcher.inc18295 { 5238 /* st1b */, AArch64::ST1B_D_IMM, Convert__SVEVectorDReg1_0__SVEPredicate3bAnyReg1_1__Reg1_3__SImm4s11_4, AMFBS_HasSVE, { MCK_SVEVectorDReg, MCK_SVEPredicate3bAnyReg, MCK__91_, MCK_GPR64sp, MCK_SImm4s1, MCK_mul, MCK_vl, MCK__93_ }, },
18321 { 5243 /* st1d */, AArch64::ST1D_IMM, Convert__SVEVectorDReg1_0__SVEPredicate3bAnyReg1_1__Reg1_3__SImm4s11_4, AMFBS_HasSVE, { MCK_SVEVectorDReg, MCK_SVEPredicate3bAnyReg, MCK__91_, MCK_GPR64sp, MCK_SImm4s1, MCK_mul, MCK_vl, MCK__93_ }, },
18365 { 5248 /* st1h */, AArch64::ST1H_D_IMM, Convert__SVEVectorDReg1_0__SVEPredicate3bAnyReg1_1__Reg1_3__SImm4s11_4, AMFBS_HasSVE, { MCK_SVEVectorDReg, MCK_SVEPredicate3bAnyReg, MCK__91_, MCK_GPR64sp, MCK_SImm4s1, MCK_mul, MCK_vl, MCK__93_ }, },
18406 { 5253 /* st1w */, AArch64::ST1W_D_IMM, Convert__SVEVectorDReg1_0__SVEPredicate3bAnyReg1_1__Reg1_3__SImm4s11_4, AMFBS_HasSVE, { MCK_SVEVectorDReg, MCK_SVEPredicate3bAnyReg, MCK__91_, MCK_GPR64sp, MCK_SImm4s1, MCK_mul, MCK_vl, MCK__93_ }, },
18734 { 5573 /* stnt1d */, AArch64::STNT1D_ZRI, Convert__SVEVectorDReg1_0__SVEPredicate3bAnyReg1_1__Reg1_3__SImm4s11_4, AMFBS_HasSVE, { MCK_SVEVectorDReg, MCK_SVEPredicate3bAnyReg, MCK__91_, MCK_GPR64sp, MCK_SImm4s1, MCK_mul, MCK_vl, MCK__93_ }, },
25653 { 5238 /* st1b */, AArch64::ST1B_D_IMM, Convert__SVEVectorDReg1_0__SVEPredicate3bAnyReg1_1__Reg1_3__SImm4s11_4, AMFBS_HasSVE, { MCK_SVEVectorDReg, MCK_SVEPredicate3bAnyReg, MCK__91_, MCK_GPR64sp, MCK_SImm4s1, MCK_mul, MCK_vl, MCK__93_ }, },
25679 { 5243 /* st1d */, AArch64::ST1D_IMM, Convert__SVEVectorDReg1_0__SVEPredicate3bAnyReg1_1__Reg1_3__SImm4s11_4, AMFBS_HasSVE, { MCK_SVEVectorDReg, MCK_SVEPredicate3bAnyReg, MCK__91_, MCK_GPR64sp, MCK_SImm4s1, MCK_mul, MCK_vl, MCK__93_ }, },
25723 { 5248 /* st1h */, AArch64::ST1H_D_IMM, Convert__SVEVectorDReg1_0__SVEPredicate3bAnyReg1_1__Reg1_3__SImm4s11_4, AMFBS_HasSVE, { MCK_SVEVectorDReg, MCK_SVEPredicate3bAnyReg, MCK__91_, MCK_GPR64sp, MCK_SImm4s1, MCK_mul, MCK_vl, MCK__93_ }, },
25764 { 5253 /* st1w */, AArch64::ST1W_D_IMM, Convert__SVEVectorDReg1_0__SVEPredicate3bAnyReg1_1__Reg1_3__SImm4s11_4, AMFBS_HasSVE, { MCK_SVEVectorDReg, MCK_SVEPredicate3bAnyReg, MCK__91_, MCK_GPR64sp, MCK_SImm4s1, MCK_mul, MCK_vl, MCK__93_ }, },
26092 { 5573 /* stnt1d */, AArch64::STNT1D_ZRI, Convert__SVEVectorDReg1_0__SVEPredicate3bAnyReg1_1__Reg1_3__SImm4s11_4, AMFBS_HasSVE, { MCK_SVEVectorDReg, MCK_SVEPredicate3bAnyReg, MCK__91_, MCK_GPR64sp, MCK_SImm4s1, MCK_mul, MCK_vl, MCK__93_ }, },