reference, declaration → definition definition → references, declarations, derived classes, virtual overrides reference to multiple definitions → definitions unreferenced |
17000 { 3883 /* rshrnb */, AArch64::RSHRNB_ZZI_B, Convert__SVEVectorBReg1_0__SVEVectorHReg1_1__Imm1_81_2, AMFBS_HasSVE2, { MCK_SVEVectorBReg, MCK_SVEVectorHReg, MCK_Imm1_8 }, }, 17226 { 4311 /* shrnb */, AArch64::SHRNB_ZZI_B, Convert__SVEVectorBReg1_0__SVEVectorHReg1_1__Imm1_81_2, AMFBS_HasSVE2, { MCK_SVEVectorBReg, MCK_SVEVectorHReg, MCK_Imm1_8 }, }, 17755 { 4867 /* sqrshrnb */, AArch64::SQRSHRNB_ZZI_B, Convert__SVEVectorBReg1_0__SVEVectorHReg1_1__Imm1_81_2, AMFBS_HasSVE2, { MCK_SVEVectorBReg, MCK_SVEVectorHReg, MCK_Imm1_8 }, }, 17770 { 4904 /* sqrshrunb */, AArch64::SQRSHRUNB_ZZI_B, Convert__SVEVectorBReg1_0__SVEVectorHReg1_1__Imm1_81_2, AMFBS_HasSVE2, { MCK_SVEVectorBReg, MCK_SVEVectorHReg, MCK_Imm1_8 }, }, 17834 { 4959 /* sqshrnb */, AArch64::SQSHRNB_ZZI_B, Convert__SVEVectorBReg1_0__SVEVectorHReg1_1__Imm1_81_2, AMFBS_HasSVE2, { MCK_SVEVectorBReg, MCK_SVEVectorHReg, MCK_Imm1_8 }, }, 17849 { 4992 /* sqshrunb */, AArch64::SQSHRUNB_ZZI_B, Convert__SVEVectorBReg1_0__SVEVectorHReg1_1__Imm1_81_2, AMFBS_HasSVE2, { MCK_SVEVectorBReg, MCK_SVEVectorHReg, MCK_Imm1_8 }, }, 19629 { 6625 /* uqrshrnb */, AArch64::UQRSHRNB_ZZI_B, Convert__SVEVectorBReg1_0__SVEVectorHReg1_1__Imm1_81_2, AMFBS_HasSVE2, { MCK_SVEVectorBReg, MCK_SVEVectorHReg, MCK_Imm1_8 }, }, 19678 { 6671 /* uqshrnb */, AArch64::UQSHRNB_ZZI_B, Convert__SVEVectorBReg1_0__SVEVectorHReg1_1__Imm1_81_2, AMFBS_HasSVE2, { MCK_SVEVectorBReg, MCK_SVEVectorHReg, MCK_Imm1_8 }, }, 24358 { 3883 /* rshrnb */, AArch64::RSHRNB_ZZI_B, Convert__SVEVectorBReg1_0__SVEVectorHReg1_1__Imm1_81_2, AMFBS_HasSVE2, { MCK_SVEVectorBReg, MCK_SVEVectorHReg, MCK_Imm1_8 }, }, 24584 { 4311 /* shrnb */, AArch64::SHRNB_ZZI_B, Convert__SVEVectorBReg1_0__SVEVectorHReg1_1__Imm1_81_2, AMFBS_HasSVE2, { MCK_SVEVectorBReg, MCK_SVEVectorHReg, MCK_Imm1_8 }, }, 25113 { 4867 /* sqrshrnb */, AArch64::SQRSHRNB_ZZI_B, Convert__SVEVectorBReg1_0__SVEVectorHReg1_1__Imm1_81_2, AMFBS_HasSVE2, { MCK_SVEVectorBReg, MCK_SVEVectorHReg, MCK_Imm1_8 }, }, 25128 { 4904 /* sqrshrunb */, AArch64::SQRSHRUNB_ZZI_B, Convert__SVEVectorBReg1_0__SVEVectorHReg1_1__Imm1_81_2, AMFBS_HasSVE2, { MCK_SVEVectorBReg, MCK_SVEVectorHReg, MCK_Imm1_8 }, }, 25192 { 4959 /* sqshrnb */, AArch64::SQSHRNB_ZZI_B, Convert__SVEVectorBReg1_0__SVEVectorHReg1_1__Imm1_81_2, AMFBS_HasSVE2, { MCK_SVEVectorBReg, MCK_SVEVectorHReg, MCK_Imm1_8 }, }, 25207 { 4992 /* sqshrunb */, AArch64::SQSHRUNB_ZZI_B, Convert__SVEVectorBReg1_0__SVEVectorHReg1_1__Imm1_81_2, AMFBS_HasSVE2, { MCK_SVEVectorBReg, MCK_SVEVectorHReg, MCK_Imm1_8 }, }, 26987 { 6625 /* uqrshrnb */, AArch64::UQRSHRNB_ZZI_B, Convert__SVEVectorBReg1_0__SVEVectorHReg1_1__Imm1_81_2, AMFBS_HasSVE2, { MCK_SVEVectorBReg, MCK_SVEVectorHReg, MCK_Imm1_8 }, }, 27036 { 6671 /* uqshrnb */, AArch64::UQSHRNB_ZZI_B, Convert__SVEVectorBReg1_0__SVEVectorHReg1_1__Imm1_81_2, AMFBS_HasSVE2, { MCK_SVEVectorBReg, MCK_SVEVectorHReg, MCK_Imm1_8 }, },