reference, declarationdefinition
definition → references, declarations, derived classes, virtual overrides
reference to multiple definitions → definitions
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References

gen/lib/Target/AArch64/AArch64GenAsmMatcher.inc
13233   { 669 /* cmpeq */, AArch64::CMPEQ_WIDE_PPzZZ_S, Convert__SVEPredicateSReg1_0__SVEPredicate3bAnyReg1_1__SVEVectorSReg1_4__SVEVectorDReg1_5, AMFBS_HasSVE, { MCK_SVEPredicateSReg, MCK_SVEPredicate3bAnyReg, MCK__47_, MCK_z, MCK_SVEVectorSReg, MCK_SVEVectorDReg }, },
13244   { 675 /* cmpge */, AArch64::CMPGE_WIDE_PPzZZ_S, Convert__SVEPredicateSReg1_0__SVEPredicate3bAnyReg1_1__SVEVectorSReg1_4__SVEVectorDReg1_5, AMFBS_HasSVE, { MCK_SVEPredicateSReg, MCK_SVEPredicate3bAnyReg, MCK__47_, MCK_z, MCK_SVEVectorSReg, MCK_SVEVectorDReg }, },
13255   { 681 /* cmpgt */, AArch64::CMPGT_WIDE_PPzZZ_S, Convert__SVEPredicateSReg1_0__SVEPredicate3bAnyReg1_1__SVEVectorSReg1_4__SVEVectorDReg1_5, AMFBS_HasSVE, { MCK_SVEPredicateSReg, MCK_SVEPredicate3bAnyReg, MCK__47_, MCK_z, MCK_SVEVectorSReg, MCK_SVEVectorDReg }, },
13266   { 687 /* cmphi */, AArch64::CMPHI_WIDE_PPzZZ_S, Convert__SVEPredicateSReg1_0__SVEPredicate3bAnyReg1_1__SVEVectorSReg1_4__SVEVectorDReg1_5, AMFBS_HasSVE, { MCK_SVEPredicateSReg, MCK_SVEPredicate3bAnyReg, MCK__47_, MCK_z, MCK_SVEVectorSReg, MCK_SVEVectorDReg }, },
13277   { 693 /* cmphs */, AArch64::CMPHS_WIDE_PPzZZ_S, Convert__SVEPredicateSReg1_0__SVEPredicate3bAnyReg1_1__SVEVectorSReg1_4__SVEVectorDReg1_5, AMFBS_HasSVE, { MCK_SVEPredicateSReg, MCK_SVEPredicate3bAnyReg, MCK__47_, MCK_z, MCK_SVEVectorSReg, MCK_SVEVectorDReg }, },
13288   { 699 /* cmple */, AArch64::CMPLE_WIDE_PPzZZ_S, Convert__SVEPredicateSReg1_0__SVEPredicate3bAnyReg1_1__SVEVectorSReg1_4__SVEVectorDReg1_5, AMFBS_HasSVE, { MCK_SVEPredicateSReg, MCK_SVEPredicate3bAnyReg, MCK__47_, MCK_z, MCK_SVEVectorSReg, MCK_SVEVectorDReg }, },
13299   { 705 /* cmplo */, AArch64::CMPLO_WIDE_PPzZZ_S, Convert__SVEPredicateSReg1_0__SVEPredicate3bAnyReg1_1__SVEVectorSReg1_4__SVEVectorDReg1_5, AMFBS_HasSVE, { MCK_SVEPredicateSReg, MCK_SVEPredicate3bAnyReg, MCK__47_, MCK_z, MCK_SVEVectorSReg, MCK_SVEVectorDReg }, },
13310   { 711 /* cmpls */, AArch64::CMPLS_WIDE_PPzZZ_S, Convert__SVEPredicateSReg1_0__SVEPredicate3bAnyReg1_1__SVEVectorSReg1_4__SVEVectorDReg1_5, AMFBS_HasSVE, { MCK_SVEPredicateSReg, MCK_SVEPredicate3bAnyReg, MCK__47_, MCK_z, MCK_SVEVectorSReg, MCK_SVEVectorDReg }, },
13321   { 717 /* cmplt */, AArch64::CMPLT_WIDE_PPzZZ_S, Convert__SVEPredicateSReg1_0__SVEPredicate3bAnyReg1_1__SVEVectorSReg1_4__SVEVectorDReg1_5, AMFBS_HasSVE, { MCK_SVEPredicateSReg, MCK_SVEPredicate3bAnyReg, MCK__47_, MCK_z, MCK_SVEVectorSReg, MCK_SVEVectorDReg }, },
13332   { 723 /* cmpne */, AArch64::CMPNE_WIDE_PPzZZ_S, Convert__SVEPredicateSReg1_0__SVEPredicate3bAnyReg1_1__SVEVectorSReg1_4__SVEVectorDReg1_5, AMFBS_HasSVE, { MCK_SVEPredicateSReg, MCK_SVEPredicate3bAnyReg, MCK__47_, MCK_z, MCK_SVEVectorSReg, MCK_SVEVectorDReg }, },
20591   { 669 /* cmpeq */, AArch64::CMPEQ_WIDE_PPzZZ_S, Convert__SVEPredicateSReg1_0__SVEPredicate3bAnyReg1_1__SVEVectorSReg1_4__SVEVectorDReg1_5, AMFBS_HasSVE, { MCK_SVEPredicateSReg, MCK_SVEPredicate3bAnyReg, MCK__47_, MCK_z, MCK_SVEVectorSReg, MCK_SVEVectorDReg }, },
20602   { 675 /* cmpge */, AArch64::CMPGE_WIDE_PPzZZ_S, Convert__SVEPredicateSReg1_0__SVEPredicate3bAnyReg1_1__SVEVectorSReg1_4__SVEVectorDReg1_5, AMFBS_HasSVE, { MCK_SVEPredicateSReg, MCK_SVEPredicate3bAnyReg, MCK__47_, MCK_z, MCK_SVEVectorSReg, MCK_SVEVectorDReg }, },
20613   { 681 /* cmpgt */, AArch64::CMPGT_WIDE_PPzZZ_S, Convert__SVEPredicateSReg1_0__SVEPredicate3bAnyReg1_1__SVEVectorSReg1_4__SVEVectorDReg1_5, AMFBS_HasSVE, { MCK_SVEPredicateSReg, MCK_SVEPredicate3bAnyReg, MCK__47_, MCK_z, MCK_SVEVectorSReg, MCK_SVEVectorDReg }, },
20624   { 687 /* cmphi */, AArch64::CMPHI_WIDE_PPzZZ_S, Convert__SVEPredicateSReg1_0__SVEPredicate3bAnyReg1_1__SVEVectorSReg1_4__SVEVectorDReg1_5, AMFBS_HasSVE, { MCK_SVEPredicateSReg, MCK_SVEPredicate3bAnyReg, MCK__47_, MCK_z, MCK_SVEVectorSReg, MCK_SVEVectorDReg }, },
20635   { 693 /* cmphs */, AArch64::CMPHS_WIDE_PPzZZ_S, Convert__SVEPredicateSReg1_0__SVEPredicate3bAnyReg1_1__SVEVectorSReg1_4__SVEVectorDReg1_5, AMFBS_HasSVE, { MCK_SVEPredicateSReg, MCK_SVEPredicate3bAnyReg, MCK__47_, MCK_z, MCK_SVEVectorSReg, MCK_SVEVectorDReg }, },
20646   { 699 /* cmple */, AArch64::CMPLE_WIDE_PPzZZ_S, Convert__SVEPredicateSReg1_0__SVEPredicate3bAnyReg1_1__SVEVectorSReg1_4__SVEVectorDReg1_5, AMFBS_HasSVE, { MCK_SVEPredicateSReg, MCK_SVEPredicate3bAnyReg, MCK__47_, MCK_z, MCK_SVEVectorSReg, MCK_SVEVectorDReg }, },
20657   { 705 /* cmplo */, AArch64::CMPLO_WIDE_PPzZZ_S, Convert__SVEPredicateSReg1_0__SVEPredicate3bAnyReg1_1__SVEVectorSReg1_4__SVEVectorDReg1_5, AMFBS_HasSVE, { MCK_SVEPredicateSReg, MCK_SVEPredicate3bAnyReg, MCK__47_, MCK_z, MCK_SVEVectorSReg, MCK_SVEVectorDReg }, },
20668   { 711 /* cmpls */, AArch64::CMPLS_WIDE_PPzZZ_S, Convert__SVEPredicateSReg1_0__SVEPredicate3bAnyReg1_1__SVEVectorSReg1_4__SVEVectorDReg1_5, AMFBS_HasSVE, { MCK_SVEPredicateSReg, MCK_SVEPredicate3bAnyReg, MCK__47_, MCK_z, MCK_SVEVectorSReg, MCK_SVEVectorDReg }, },
20679   { 717 /* cmplt */, AArch64::CMPLT_WIDE_PPzZZ_S, Convert__SVEPredicateSReg1_0__SVEPredicate3bAnyReg1_1__SVEVectorSReg1_4__SVEVectorDReg1_5, AMFBS_HasSVE, { MCK_SVEPredicateSReg, MCK_SVEPredicate3bAnyReg, MCK__47_, MCK_z, MCK_SVEVectorSReg, MCK_SVEVectorDReg }, },
20690   { 723 /* cmpne */, AArch64::CMPNE_WIDE_PPzZZ_S, Convert__SVEPredicateSReg1_0__SVEPredicate3bAnyReg1_1__SVEVectorSReg1_4__SVEVectorDReg1_5, AMFBS_HasSVE, { MCK_SVEPredicateSReg, MCK_SVEPredicate3bAnyReg, MCK__47_, MCK_z, MCK_SVEVectorSReg, MCK_SVEVectorDReg }, },