reference, declarationdefinition
definition → references, declarations, derived classes, virtual overrides
reference to multiple definitions → definitions
unreferenced

References

gen/lib/Target/AArch64/AArch64GenAsmMatcher.inc
13229   { 669 /* cmpeq */, AArch64::CMPEQ_PPzZZ_H, Convert__SVEPredicateHReg1_0__SVEPredicate3bAnyReg1_1__SVEVectorHReg1_4__SVEVectorHReg1_5, AMFBS_HasSVE, { MCK_SVEPredicateHReg, MCK_SVEPredicate3bAnyReg, MCK__47_, MCK_z, MCK_SVEVectorHReg, MCK_SVEVectorHReg }, },
13240   { 675 /* cmpge */, AArch64::CMPGE_PPzZZ_H, Convert__SVEPredicateHReg1_0__SVEPredicate3bAnyReg1_1__SVEVectorHReg1_4__SVEVectorHReg1_5, AMFBS_HasSVE, { MCK_SVEPredicateHReg, MCK_SVEPredicate3bAnyReg, MCK__47_, MCK_z, MCK_SVEVectorHReg, MCK_SVEVectorHReg }, },
13251   { 681 /* cmpgt */, AArch64::CMPGT_PPzZZ_H, Convert__SVEPredicateHReg1_0__SVEPredicate3bAnyReg1_1__SVEVectorHReg1_4__SVEVectorHReg1_5, AMFBS_HasSVE, { MCK_SVEPredicateHReg, MCK_SVEPredicate3bAnyReg, MCK__47_, MCK_z, MCK_SVEVectorHReg, MCK_SVEVectorHReg }, },
13262   { 687 /* cmphi */, AArch64::CMPHI_PPzZZ_H, Convert__SVEPredicateHReg1_0__SVEPredicate3bAnyReg1_1__SVEVectorHReg1_4__SVEVectorHReg1_5, AMFBS_HasSVE, { MCK_SVEPredicateHReg, MCK_SVEPredicate3bAnyReg, MCK__47_, MCK_z, MCK_SVEVectorHReg, MCK_SVEVectorHReg }, },
13273   { 693 /* cmphs */, AArch64::CMPHS_PPzZZ_H, Convert__SVEPredicateHReg1_0__SVEPredicate3bAnyReg1_1__SVEVectorHReg1_4__SVEVectorHReg1_5, AMFBS_HasSVE, { MCK_SVEPredicateHReg, MCK_SVEPredicate3bAnyReg, MCK__47_, MCK_z, MCK_SVEVectorHReg, MCK_SVEVectorHReg }, },
13328   { 723 /* cmpne */, AArch64::CMPNE_PPzZZ_H, Convert__SVEPredicateHReg1_0__SVEPredicate3bAnyReg1_1__SVEVectorHReg1_4__SVEVectorHReg1_5, AMFBS_HasSVE, { MCK_SVEPredicateHReg, MCK_SVEPredicate3bAnyReg, MCK__47_, MCK_z, MCK_SVEVectorHReg, MCK_SVEVectorHReg }, },
13577   { 1048 /* facge */, AArch64::FACGE_PPzZZ_H, Convert__SVEPredicateHReg1_0__SVEPredicate3bAnyReg1_1__SVEVectorHReg1_4__SVEVectorHReg1_5, AMFBS_HasSVE, { MCK_SVEPredicateHReg, MCK_SVEPredicate3bAnyReg, MCK__47_, MCK_z, MCK_SVEVectorHReg, MCK_SVEVectorHReg }, },
13588   { 1054 /* facgt */, AArch64::FACGT_PPzZZ_H, Convert__SVEPredicateHReg1_0__SVEPredicate3bAnyReg1_1__SVEVectorHReg1_4__SVEVectorHReg1_5, AMFBS_HasSVE, { MCK_SVEPredicateHReg, MCK_SVEPredicate3bAnyReg, MCK__47_, MCK_z, MCK_SVEVectorHReg, MCK_SVEVectorHReg }, },
13683   { 1114 /* fcmeq */, AArch64::FCMEQ_PPzZZ_H, Convert__SVEPredicateHReg1_0__SVEPredicate3bAnyReg1_1__SVEVectorHReg1_4__SVEVectorHReg1_5, AMFBS_HasSVE, { MCK_SVEPredicateHReg, MCK_SVEPredicate3bAnyReg, MCK__47_, MCK_z, MCK_SVEVectorHReg, MCK_SVEVectorHReg }, },
13718   { 1120 /* fcmge */, AArch64::FCMGE_PPzZZ_H, Convert__SVEPredicateHReg1_0__SVEPredicate3bAnyReg1_1__SVEVectorHReg1_4__SVEVectorHReg1_5, AMFBS_HasSVE, { MCK_SVEPredicateHReg, MCK_SVEPredicate3bAnyReg, MCK__47_, MCK_z, MCK_SVEVectorHReg, MCK_SVEVectorHReg }, },
13753   { 1126 /* fcmgt */, AArch64::FCMGT_PPzZZ_H, Convert__SVEPredicateHReg1_0__SVEPredicate3bAnyReg1_1__SVEVectorHReg1_4__SVEVectorHReg1_5, AMFBS_HasSVE, { MCK_SVEPredicateHReg, MCK_SVEPredicate3bAnyReg, MCK__47_, MCK_z, MCK_SVEVectorHReg, MCK_SVEVectorHReg }, },
13850   { 1150 /* fcmne */, AArch64::FCMNE_PPzZZ_H, Convert__SVEPredicateHReg1_0__SVEPredicate3bAnyReg1_1__SVEVectorHReg1_4__SVEVectorHReg1_5, AMFBS_HasSVE, { MCK_SVEPredicateHReg, MCK_SVEPredicate3bAnyReg, MCK__47_, MCK_z, MCK_SVEVectorHReg, MCK_SVEVectorHReg }, },
13868   { 1167 /* fcmuo */, AArch64::FCMUO_PPzZZ_H, Convert__SVEPredicateHReg1_0__SVEPredicate3bAnyReg1_1__SVEVectorHReg1_4__SVEVectorHReg1_5, AMFBS_HasSVE, { MCK_SVEPredicateHReg, MCK_SVEPredicate3bAnyReg, MCK__47_, MCK_z, MCK_SVEVectorHReg, MCK_SVEVectorHReg }, },
16479   { 3337 /* match */, AArch64::MATCH_PPzZZ_H, Convert__SVEPredicateHReg1_0__SVEPredicate3bAnyReg1_1__SVEVectorHReg1_4__SVEVectorHReg1_5, AMFBS_HasSVE2, { MCK_SVEPredicateHReg, MCK_SVEPredicate3bAnyReg, MCK__47_, MCK_z, MCK_SVEVectorHReg, MCK_SVEVectorHReg }, },
16747   { 3457 /* nmatch */, AArch64::NMATCH_PPzZZ_H, Convert__SVEPredicateHReg1_0__SVEPredicate3bAnyReg1_1__SVEVectorHReg1_4__SVEVectorHReg1_5, AMFBS_HasSVE2, { MCK_SVEPredicateHReg, MCK_SVEPredicate3bAnyReg, MCK__47_, MCK_z, MCK_SVEVectorHReg, MCK_SVEVectorHReg }, },
20587   { 669 /* cmpeq */, AArch64::CMPEQ_PPzZZ_H, Convert__SVEPredicateHReg1_0__SVEPredicate3bAnyReg1_1__SVEVectorHReg1_4__SVEVectorHReg1_5, AMFBS_HasSVE, { MCK_SVEPredicateHReg, MCK_SVEPredicate3bAnyReg, MCK__47_, MCK_z, MCK_SVEVectorHReg, MCK_SVEVectorHReg }, },
20598   { 675 /* cmpge */, AArch64::CMPGE_PPzZZ_H, Convert__SVEPredicateHReg1_0__SVEPredicate3bAnyReg1_1__SVEVectorHReg1_4__SVEVectorHReg1_5, AMFBS_HasSVE, { MCK_SVEPredicateHReg, MCK_SVEPredicate3bAnyReg, MCK__47_, MCK_z, MCK_SVEVectorHReg, MCK_SVEVectorHReg }, },
20609   { 681 /* cmpgt */, AArch64::CMPGT_PPzZZ_H, Convert__SVEPredicateHReg1_0__SVEPredicate3bAnyReg1_1__SVEVectorHReg1_4__SVEVectorHReg1_5, AMFBS_HasSVE, { MCK_SVEPredicateHReg, MCK_SVEPredicate3bAnyReg, MCK__47_, MCK_z, MCK_SVEVectorHReg, MCK_SVEVectorHReg }, },
20620   { 687 /* cmphi */, AArch64::CMPHI_PPzZZ_H, Convert__SVEPredicateHReg1_0__SVEPredicate3bAnyReg1_1__SVEVectorHReg1_4__SVEVectorHReg1_5, AMFBS_HasSVE, { MCK_SVEPredicateHReg, MCK_SVEPredicate3bAnyReg, MCK__47_, MCK_z, MCK_SVEVectorHReg, MCK_SVEVectorHReg }, },
20631   { 693 /* cmphs */, AArch64::CMPHS_PPzZZ_H, Convert__SVEPredicateHReg1_0__SVEPredicate3bAnyReg1_1__SVEVectorHReg1_4__SVEVectorHReg1_5, AMFBS_HasSVE, { MCK_SVEPredicateHReg, MCK_SVEPredicate3bAnyReg, MCK__47_, MCK_z, MCK_SVEVectorHReg, MCK_SVEVectorHReg }, },
20686   { 723 /* cmpne */, AArch64::CMPNE_PPzZZ_H, Convert__SVEPredicateHReg1_0__SVEPredicate3bAnyReg1_1__SVEVectorHReg1_4__SVEVectorHReg1_5, AMFBS_HasSVE, { MCK_SVEPredicateHReg, MCK_SVEPredicate3bAnyReg, MCK__47_, MCK_z, MCK_SVEVectorHReg, MCK_SVEVectorHReg }, },
20940   { 1048 /* facge */, AArch64::FACGE_PPzZZ_H, Convert__SVEPredicateHReg1_0__SVEPredicate3bAnyReg1_1__SVEVectorHReg1_4__SVEVectorHReg1_5, AMFBS_HasSVE, { MCK_SVEPredicateHReg, MCK_SVEPredicate3bAnyReg, MCK__47_, MCK_z, MCK_SVEVectorHReg, MCK_SVEVectorHReg }, },
20951   { 1054 /* facgt */, AArch64::FACGT_PPzZZ_H, Convert__SVEPredicateHReg1_0__SVEPredicate3bAnyReg1_1__SVEVectorHReg1_4__SVEVectorHReg1_5, AMFBS_HasSVE, { MCK_SVEPredicateHReg, MCK_SVEPredicate3bAnyReg, MCK__47_, MCK_z, MCK_SVEVectorHReg, MCK_SVEVectorHReg }, },
21051   { 1114 /* fcmeq */, AArch64::FCMEQ_PPzZZ_H, Convert__SVEPredicateHReg1_0__SVEPredicate3bAnyReg1_1__SVEVectorHReg1_4__SVEVectorHReg1_5, AMFBS_HasSVE, { MCK_SVEPredicateHReg, MCK_SVEPredicate3bAnyReg, MCK__47_, MCK_z, MCK_SVEVectorHReg, MCK_SVEVectorHReg }, },
21086   { 1120 /* fcmge */, AArch64::FCMGE_PPzZZ_H, Convert__SVEPredicateHReg1_0__SVEPredicate3bAnyReg1_1__SVEVectorHReg1_4__SVEVectorHReg1_5, AMFBS_HasSVE, { MCK_SVEPredicateHReg, MCK_SVEPredicate3bAnyReg, MCK__47_, MCK_z, MCK_SVEVectorHReg, MCK_SVEVectorHReg }, },
21121   { 1126 /* fcmgt */, AArch64::FCMGT_PPzZZ_H, Convert__SVEPredicateHReg1_0__SVEPredicate3bAnyReg1_1__SVEVectorHReg1_4__SVEVectorHReg1_5, AMFBS_HasSVE, { MCK_SVEPredicateHReg, MCK_SVEPredicate3bAnyReg, MCK__47_, MCK_z, MCK_SVEVectorHReg, MCK_SVEVectorHReg }, },
21208   { 1150 /* fcmne */, AArch64::FCMNE_PPzZZ_H, Convert__SVEPredicateHReg1_0__SVEPredicate3bAnyReg1_1__SVEVectorHReg1_4__SVEVectorHReg1_5, AMFBS_HasSVE, { MCK_SVEPredicateHReg, MCK_SVEPredicate3bAnyReg, MCK__47_, MCK_z, MCK_SVEVectorHReg, MCK_SVEVectorHReg }, },
21226   { 1167 /* fcmuo */, AArch64::FCMUO_PPzZZ_H, Convert__SVEPredicateHReg1_0__SVEPredicate3bAnyReg1_1__SVEVectorHReg1_4__SVEVectorHReg1_5, AMFBS_HasSVE, { MCK_SVEPredicateHReg, MCK_SVEPredicate3bAnyReg, MCK__47_, MCK_z, MCK_SVEVectorHReg, MCK_SVEVectorHReg }, },
23837   { 3337 /* match */, AArch64::MATCH_PPzZZ_H, Convert__SVEPredicateHReg1_0__SVEPredicate3bAnyReg1_1__SVEVectorHReg1_4__SVEVectorHReg1_5, AMFBS_HasSVE2, { MCK_SVEPredicateHReg, MCK_SVEPredicate3bAnyReg, MCK__47_, MCK_z, MCK_SVEVectorHReg, MCK_SVEVectorHReg }, },
24105   { 3457 /* nmatch */, AArch64::NMATCH_PPzZZ_H, Convert__SVEPredicateHReg1_0__SVEPredicate3bAnyReg1_1__SVEVectorHReg1_4__SVEVectorHReg1_5, AMFBS_HasSVE2, { MCK_SVEPredicateHReg, MCK_SVEPredicate3bAnyReg, MCK__47_, MCK_z, MCK_SVEVectorHReg, MCK_SVEVectorHReg }, },