reference, declarationdefinition
definition → references, declarations, derived classes, virtual overrides
reference to multiple definitions → definitions
unreferenced

References

gen/lib/Target/AArch64/AArch64GenAsmMatcher.inc
13290   { 699 /* cmple */, AArch64::CMPGE_PPzZZ_D, Convert__SVEPredicateDReg1_0__SVEPredicate3bAnyReg1_1__SVEVectorDReg1_5__SVEVectorDReg1_4, AMFBS_HasSVE, { MCK_SVEPredicateDReg, MCK_SVEPredicate3bAnyReg, MCK__47_, MCK_z, MCK_SVEVectorDReg, MCK_SVEVectorDReg }, },
13301   { 705 /* cmplo */, AArch64::CMPHI_PPzZZ_D, Convert__SVEPredicateDReg1_0__SVEPredicate3bAnyReg1_1__SVEVectorDReg1_5__SVEVectorDReg1_4, AMFBS_HasSVE, { MCK_SVEPredicateDReg, MCK_SVEPredicate3bAnyReg, MCK__47_, MCK_z, MCK_SVEVectorDReg, MCK_SVEVectorDReg }, },
13312   { 711 /* cmpls */, AArch64::CMPHS_PPzZZ_D, Convert__SVEPredicateDReg1_0__SVEPredicate3bAnyReg1_1__SVEVectorDReg1_5__SVEVectorDReg1_4, AMFBS_HasSVE, { MCK_SVEPredicateDReg, MCK_SVEPredicate3bAnyReg, MCK__47_, MCK_z, MCK_SVEVectorDReg, MCK_SVEVectorDReg }, },
13323   { 717 /* cmplt */, AArch64::CMPGT_PPzZZ_D, Convert__SVEPredicateDReg1_0__SVEPredicate3bAnyReg1_1__SVEVectorDReg1_5__SVEVectorDReg1_4, AMFBS_HasSVE, { MCK_SVEPredicateDReg, MCK_SVEPredicate3bAnyReg, MCK__47_, MCK_z, MCK_SVEVectorDReg, MCK_SVEVectorDReg }, },
13600   { 1060 /* facle */, AArch64::FACGE_PPzZZ_D, Convert__SVEPredicateDReg1_0__SVEPredicate3bAnyReg1_1__SVEVectorDReg1_5__SVEVectorDReg1_4, AMFBS_HasSVE, { MCK_SVEPredicateDReg, MCK_SVEPredicate3bAnyReg, MCK__47_, MCK_z, MCK_SVEVectorDReg, MCK_SVEVectorDReg }, },
13610   { 1066 /* faclt */, AArch64::FACGT_PPzZZ_D, Convert__SVEPredicateDReg1_0__SVEPredicate3bAnyReg1_1__SVEVectorDReg1_5__SVEVectorDReg1_4, AMFBS_HasSVE, { MCK_SVEPredicateDReg, MCK_SVEPredicate3bAnyReg, MCK__47_, MCK_z, MCK_SVEVectorDReg, MCK_SVEVectorDReg }, },
13802   { 1138 /* fcmle */, AArch64::FCMGE_PPzZZ_D, Convert__SVEPredicateDReg1_0__SVEPredicate3bAnyReg1_1__SVEVectorDReg1_5__SVEVectorDReg1_4, AMFBS_HasSVE, { MCK_SVEPredicateDReg, MCK_SVEPredicate3bAnyReg, MCK__47_, MCK_z, MCK_SVEVectorDReg, MCK_SVEVectorDReg }, },
13836   { 1144 /* fcmlt */, AArch64::FCMGT_PPzZZ_D, Convert__SVEPredicateDReg1_0__SVEPredicate3bAnyReg1_1__SVEVectorDReg1_5__SVEVectorDReg1_4, AMFBS_HasSVE, { MCK_SVEPredicateDReg, MCK_SVEPredicate3bAnyReg, MCK__47_, MCK_z, MCK_SVEVectorDReg, MCK_SVEVectorDReg }, },
20648   { 699 /* cmple */, AArch64::CMPGE_PPzZZ_D, Convert__SVEPredicateDReg1_0__SVEPredicate3bAnyReg1_1__SVEVectorDReg1_5__SVEVectorDReg1_4, AMFBS_HasSVE, { MCK_SVEPredicateDReg, MCK_SVEPredicate3bAnyReg, MCK__47_, MCK_z, MCK_SVEVectorDReg, MCK_SVEVectorDReg }, },
20659   { 705 /* cmplo */, AArch64::CMPHI_PPzZZ_D, Convert__SVEPredicateDReg1_0__SVEPredicate3bAnyReg1_1__SVEVectorDReg1_5__SVEVectorDReg1_4, AMFBS_HasSVE, { MCK_SVEPredicateDReg, MCK_SVEPredicate3bAnyReg, MCK__47_, MCK_z, MCK_SVEVectorDReg, MCK_SVEVectorDReg }, },
20670   { 711 /* cmpls */, AArch64::CMPHS_PPzZZ_D, Convert__SVEPredicateDReg1_0__SVEPredicate3bAnyReg1_1__SVEVectorDReg1_5__SVEVectorDReg1_4, AMFBS_HasSVE, { MCK_SVEPredicateDReg, MCK_SVEPredicate3bAnyReg, MCK__47_, MCK_z, MCK_SVEVectorDReg, MCK_SVEVectorDReg }, },
20681   { 717 /* cmplt */, AArch64::CMPGT_PPzZZ_D, Convert__SVEPredicateDReg1_0__SVEPredicate3bAnyReg1_1__SVEVectorDReg1_5__SVEVectorDReg1_4, AMFBS_HasSVE, { MCK_SVEPredicateDReg, MCK_SVEPredicate3bAnyReg, MCK__47_, MCK_z, MCK_SVEVectorDReg, MCK_SVEVectorDReg }, },
20963   { 1060 /* facle */, AArch64::FACGE_PPzZZ_D, Convert__SVEPredicateDReg1_0__SVEPredicate3bAnyReg1_1__SVEVectorDReg1_5__SVEVectorDReg1_4, AMFBS_HasSVE, { MCK_SVEPredicateDReg, MCK_SVEPredicate3bAnyReg, MCK__47_, MCK_z, MCK_SVEVectorDReg, MCK_SVEVectorDReg }, },
20973   { 1066 /* faclt */, AArch64::FACGT_PPzZZ_D, Convert__SVEPredicateDReg1_0__SVEPredicate3bAnyReg1_1__SVEVectorDReg1_5__SVEVectorDReg1_4, AMFBS_HasSVE, { MCK_SVEPredicateDReg, MCK_SVEPredicate3bAnyReg, MCK__47_, MCK_z, MCK_SVEVectorDReg, MCK_SVEVectorDReg }, },
21170   { 1138 /* fcmle */, AArch64::FCMGE_PPzZZ_D, Convert__SVEPredicateDReg1_0__SVEPredicate3bAnyReg1_1__SVEVectorDReg1_5__SVEVectorDReg1_4, AMFBS_HasSVE, { MCK_SVEPredicateDReg, MCK_SVEPredicate3bAnyReg, MCK__47_, MCK_z, MCK_SVEVectorDReg, MCK_SVEVectorDReg }, },
21204   { 1144 /* fcmlt */, AArch64::FCMGT_PPzZZ_D, Convert__SVEPredicateDReg1_0__SVEPredicate3bAnyReg1_1__SVEVectorDReg1_5__SVEVectorDReg1_4, AMFBS_HasSVE, { MCK_SVEPredicateDReg, MCK_SVEPredicate3bAnyReg, MCK__47_, MCK_z, MCK_SVEVectorDReg, MCK_SVEVectorDReg }, },