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reference, declaration → definition
definition → references, declarations, derived classes, virtual overrides
reference to multiple definitions → definitions
unreferenced
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References
gen/lib/Target/AArch64/AArch64GenAsmMatcher.inc16173 { 2650 /* ldr */, AArch64::LDRWpost, Convert__Reg1_2__Reg1_0__Tie0_3_3__SImm91_4, AMFBS_None, { MCK_GPR32, MCK__91_, MCK_GPR64sp, MCK__93_, MCK_SImm9 }, },
16177 { 2650 /* ldr */, AArch64::LDRXpost, Convert__Reg1_2__Reg1_0__Tie0_3_3__SImm91_4, AMFBS_None, { MCK_GPR64, MCK__91_, MCK_GPR64sp, MCK__93_, MCK_SImm9 }, },
16231 { 2666 /* ldrb */, AArch64::LDRBBpost, Convert__Reg1_2__Reg1_0__Tie0_3_3__SImm91_4, AMFBS_None, { MCK_GPR32, MCK__91_, MCK_GPR64sp, MCK__93_, MCK_SImm9 }, },
16239 { 2671 /* ldrh */, AArch64::LDRHHpost, Convert__Reg1_2__Reg1_0__Tie0_3_3__SImm91_4, AMFBS_None, { MCK_GPR32, MCK__91_, MCK_GPR64sp, MCK__93_, MCK_SImm9 }, },
16248 { 2676 /* ldrsb */, AArch64::LDRSBWpost, Convert__Reg1_2__Reg1_0__Tie0_3_3__SImm91_4, AMFBS_None, { MCK_GPR32, MCK__91_, MCK_GPR64sp, MCK__93_, MCK_SImm9 }, },
16252 { 2676 /* ldrsb */, AArch64::LDRSBXpost, Convert__Reg1_2__Reg1_0__Tie0_3_3__SImm91_4, AMFBS_None, { MCK_GPR64, MCK__91_, MCK_GPR64sp, MCK__93_, MCK_SImm9 }, },
16264 { 2682 /* ldrsh */, AArch64::LDRSHWpost, Convert__Reg1_2__Reg1_0__Tie0_3_3__SImm91_4, AMFBS_None, { MCK_GPR32, MCK__91_, MCK_GPR64sp, MCK__93_, MCK_SImm9 }, },
16268 { 2682 /* ldrsh */, AArch64::LDRSHXpost, Convert__Reg1_2__Reg1_0__Tie0_3_3__SImm91_4, AMFBS_None, { MCK_GPR64, MCK__91_, MCK_GPR64sp, MCK__93_, MCK_SImm9 }, },
16280 { 2688 /* ldrsw */, AArch64::LDRSWpost, Convert__Reg1_2__Reg1_0__Tie0_3_3__SImm91_4, AMFBS_None, { MCK_GPR64, MCK__91_, MCK_GPR64sp, MCK__93_, MCK_SImm9 }, },
18793 { 5598 /* str */, AArch64::STRWpost, Convert__Reg1_2__Reg1_0__Tie0_3_3__SImm91_4, AMFBS_None, { MCK_GPR32, MCK__91_, MCK_GPR64sp, MCK__93_, MCK_SImm9 }, },
18797 { 5598 /* str */, AArch64::STRXpost, Convert__Reg1_2__Reg1_0__Tie0_3_3__SImm91_4, AMFBS_None, { MCK_GPR64, MCK__91_, MCK_GPR64sp, MCK__93_, MCK_SImm9 }, },
18845 { 5602 /* strb */, AArch64::STRBBpost, Convert__Reg1_2__Reg1_0__Tie0_3_3__SImm91_4, AMFBS_None, { MCK_GPR32, MCK__91_, MCK_GPR64sp, MCK__93_, MCK_SImm9 }, },
18853 { 5607 /* strh */, AArch64::STRHHpost, Convert__Reg1_2__Reg1_0__Tie0_3_3__SImm91_4, AMFBS_None, { MCK_GPR32, MCK__91_, MCK_GPR64sp, MCK__93_, MCK_SImm9 }, },
23531 { 2650 /* ldr */, AArch64::LDRWpost, Convert__Reg1_2__Reg1_0__Tie0_3_3__SImm91_4, AMFBS_None, { MCK_GPR32, MCK__91_, MCK_GPR64sp, MCK__93_, MCK_SImm9 }, },
23535 { 2650 /* ldr */, AArch64::LDRXpost, Convert__Reg1_2__Reg1_0__Tie0_3_3__SImm91_4, AMFBS_None, { MCK_GPR64, MCK__91_, MCK_GPR64sp, MCK__93_, MCK_SImm9 }, },
23589 { 2666 /* ldrb */, AArch64::LDRBBpost, Convert__Reg1_2__Reg1_0__Tie0_3_3__SImm91_4, AMFBS_None, { MCK_GPR32, MCK__91_, MCK_GPR64sp, MCK__93_, MCK_SImm9 }, },
23597 { 2671 /* ldrh */, AArch64::LDRHHpost, Convert__Reg1_2__Reg1_0__Tie0_3_3__SImm91_4, AMFBS_None, { MCK_GPR32, MCK__91_, MCK_GPR64sp, MCK__93_, MCK_SImm9 }, },
23606 { 2676 /* ldrsb */, AArch64::LDRSBWpost, Convert__Reg1_2__Reg1_0__Tie0_3_3__SImm91_4, AMFBS_None, { MCK_GPR32, MCK__91_, MCK_GPR64sp, MCK__93_, MCK_SImm9 }, },
23610 { 2676 /* ldrsb */, AArch64::LDRSBXpost, Convert__Reg1_2__Reg1_0__Tie0_3_3__SImm91_4, AMFBS_None, { MCK_GPR64, MCK__91_, MCK_GPR64sp, MCK__93_, MCK_SImm9 }, },
23622 { 2682 /* ldrsh */, AArch64::LDRSHWpost, Convert__Reg1_2__Reg1_0__Tie0_3_3__SImm91_4, AMFBS_None, { MCK_GPR32, MCK__91_, MCK_GPR64sp, MCK__93_, MCK_SImm9 }, },
23626 { 2682 /* ldrsh */, AArch64::LDRSHXpost, Convert__Reg1_2__Reg1_0__Tie0_3_3__SImm91_4, AMFBS_None, { MCK_GPR64, MCK__91_, MCK_GPR64sp, MCK__93_, MCK_SImm9 }, },
23638 { 2688 /* ldrsw */, AArch64::LDRSWpost, Convert__Reg1_2__Reg1_0__Tie0_3_3__SImm91_4, AMFBS_None, { MCK_GPR64, MCK__91_, MCK_GPR64sp, MCK__93_, MCK_SImm9 }, },
26151 { 5598 /* str */, AArch64::STRWpost, Convert__Reg1_2__Reg1_0__Tie0_3_3__SImm91_4, AMFBS_None, { MCK_GPR32, MCK__91_, MCK_GPR64sp, MCK__93_, MCK_SImm9 }, },
26155 { 5598 /* str */, AArch64::STRXpost, Convert__Reg1_2__Reg1_0__Tie0_3_3__SImm91_4, AMFBS_None, { MCK_GPR64, MCK__91_, MCK_GPR64sp, MCK__93_, MCK_SImm9 }, },
26203 { 5602 /* strb */, AArch64::STRBBpost, Convert__Reg1_2__Reg1_0__Tie0_3_3__SImm91_4, AMFBS_None, { MCK_GPR32, MCK__91_, MCK_GPR64sp, MCK__93_, MCK_SImm9 }, },
26211 { 5607 /* strh */, AArch64::STRHHpost, Convert__Reg1_2__Reg1_0__Tie0_3_3__SImm91_4, AMFBS_None, { MCK_GPR32, MCK__91_, MCK_GPR64sp, MCK__93_, MCK_SImm9 }, },