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reference, declaration → definition
definition → references, declarations, derived classes, virtual overrides
reference to multiple definitions → definitions
unreferenced
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References
gen/lib/Target/AArch64/AArch64GenAsmMatcher.inc20136 { 77 /* addv */, AArch64::ADDVv16i8v, Convert__Reg1_1__VectorReg1281_2, AMFBS_HasNEON, { MCK__DOT_16b, MCK_FPR8, MCK_VectorReg128 }, },
20138 { 77 /* addv */, AArch64::ADDVv4i32v, Convert__Reg1_1__VectorReg1281_2, AMFBS_HasNEON, { MCK__DOT_4s, MCK_FPR32, MCK_VectorReg128 }, },
20140 { 77 /* addv */, AArch64::ADDVv8i16v, Convert__Reg1_1__VectorReg1281_2, AMFBS_HasNEON, { MCK__DOT_8h, MCK_FPR16, MCK_VectorReg128 }, },
21516 { 1395 /* fmaxnmv */, AArch64::FMAXNMVv4i32v, Convert__Reg1_1__VectorReg1281_2, AMFBS_HasNEON, { MCK__DOT_4s, MCK_FPR32, MCK_VectorReg128 }, },
21517 { 1395 /* fmaxnmv */, AArch64::FMAXNMVv8i16v, Convert__Reg1_1__VectorReg1281_2, AMFBS_HasNEON_HasFullFP16, { MCK__DOT_8h, MCK_FPR16, MCK_VectorReg128 }, },
21533 { 1409 /* fmaxv */, AArch64::FMAXVv4i32v, Convert__Reg1_1__VectorReg1281_2, AMFBS_HasNEON, { MCK__DOT_4s, MCK_FPR32, MCK_VectorReg128 }, },
21534 { 1409 /* fmaxv */, AArch64::FMAXVv8i16v, Convert__Reg1_1__VectorReg1281_2, AMFBS_HasNEON_HasFullFP16, { MCK__DOT_8h, MCK_FPR16, MCK_VectorReg128 }, },
21578 { 1435 /* fminnmv */, AArch64::FMINNMVv4i32v, Convert__Reg1_1__VectorReg1281_2, AMFBS_HasNEON, { MCK__DOT_4s, MCK_FPR32, MCK_VectorReg128 }, },
21579 { 1435 /* fminnmv */, AArch64::FMINNMVv8i16v, Convert__Reg1_1__VectorReg1281_2, AMFBS_HasNEON_HasFullFP16, { MCK__DOT_8h, MCK_FPR16, MCK_VectorReg128 }, },
21595 { 1449 /* fminv */, AArch64::FMINVv4i32v, Convert__Reg1_1__VectorReg1281_2, AMFBS_HasNEON, { MCK__DOT_4s, MCK_FPR32, MCK_VectorReg128 }, },
21596 { 1449 /* fminv */, AArch64::FMINVv8i16v, Convert__Reg1_1__VectorReg1281_2, AMFBS_HasNEON_HasFullFP16, { MCK__DOT_8h, MCK_FPR16, MCK_VectorReg128 }, },
24448 { 4041 /* saddlv */, AArch64::SADDLVv16i8v, Convert__Reg1_1__VectorReg1281_2, AMFBS_HasNEON, { MCK__DOT_16b, MCK_FPR16, MCK_VectorReg128 }, },
24450 { 4041 /* saddlv */, AArch64::SADDLVv4i32v, Convert__Reg1_1__VectorReg1281_2, AMFBS_HasNEON, { MCK__DOT_4s, MCK_FPR64, MCK_VectorReg128 }, },
24452 { 4041 /* saddlv */, AArch64::SADDLVv8i16v, Convert__Reg1_1__VectorReg1281_2, AMFBS_HasNEON, { MCK__DOT_8h, MCK_FPR32, MCK_VectorReg128 }, },
24650 { 4430 /* smaxv */, AArch64::SMAXVv16i8v, Convert__Reg1_1__VectorReg1281_2, AMFBS_HasNEON, { MCK__DOT_16b, MCK_FPR8, MCK_VectorReg128 }, },
24652 { 4430 /* smaxv */, AArch64::SMAXVv4i32v, Convert__Reg1_1__VectorReg1281_2, AMFBS_HasNEON, { MCK__DOT_4s, MCK_FPR32, MCK_VectorReg128 }, },
24654 { 4430 /* smaxv */, AArch64::SMAXVv8i16v, Convert__Reg1_1__VectorReg1281_2, AMFBS_HasNEON, { MCK__DOT_8h, MCK_FPR16, MCK_VectorReg128 }, },
24684 { 4451 /* sminv */, AArch64::SMINVv16i8v, Convert__Reg1_1__VectorReg1281_2, AMFBS_HasNEON, { MCK__DOT_16b, MCK_FPR8, MCK_VectorReg128 }, },
24686 { 4451 /* sminv */, AArch64::SMINVv4i32v, Convert__Reg1_1__VectorReg1281_2, AMFBS_HasNEON, { MCK__DOT_4s, MCK_FPR32, MCK_VectorReg128 }, },
24688 { 4451 /* sminv */, AArch64::SMINVv8i16v, Convert__Reg1_1__VectorReg1281_2, AMFBS_HasNEON, { MCK__DOT_8h, MCK_FPR16, MCK_VectorReg128 }, },
26600 { 6280 /* uaddlv */, AArch64::UADDLVv16i8v, Convert__Reg1_1__VectorReg1281_2, AMFBS_HasNEON, { MCK__DOT_16b, MCK_FPR16, MCK_VectorReg128 }, },
26602 { 6280 /* uaddlv */, AArch64::UADDLVv4i32v, Convert__Reg1_1__VectorReg1281_2, AMFBS_HasNEON, { MCK__DOT_4s, MCK_FPR64, MCK_VectorReg128 }, },
26604 { 6280 /* uaddlv */, AArch64::UADDLVv8i16v, Convert__Reg1_1__VectorReg1281_2, AMFBS_HasNEON, { MCK__DOT_8h, MCK_FPR32, MCK_VectorReg128 }, },
26722 { 6388 /* umaxv */, AArch64::UMAXVv16i8v, Convert__Reg1_1__VectorReg1281_2, AMFBS_HasNEON, { MCK__DOT_16b, MCK_FPR8, MCK_VectorReg128 }, },
26724 { 6388 /* umaxv */, AArch64::UMAXVv4i32v, Convert__Reg1_1__VectorReg1281_2, AMFBS_HasNEON, { MCK__DOT_4s, MCK_FPR32, MCK_VectorReg128 }, },
26726 { 6388 /* umaxv */, AArch64::UMAXVv8i16v, Convert__Reg1_1__VectorReg1281_2, AMFBS_HasNEON, { MCK__DOT_8h, MCK_FPR16, MCK_VectorReg128 }, },
26755 { 6405 /* uminv */, AArch64::UMINVv16i8v, Convert__Reg1_1__VectorReg1281_2, AMFBS_HasNEON, { MCK__DOT_16b, MCK_FPR8, MCK_VectorReg128 }, },
26757 { 6405 /* uminv */, AArch64::UMINVv4i32v, Convert__Reg1_1__VectorReg1281_2, AMFBS_HasNEON, { MCK__DOT_4s, MCK_FPR32, MCK_VectorReg128 }, },
26759 { 6405 /* uminv */, AArch64::UMINVv8i16v, Convert__Reg1_1__VectorReg1281_2, AMFBS_HasNEON, { MCK__DOT_8h, MCK_FPR16, MCK_VectorReg128 }, },