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reference, declaration → definition
definition → references, declarations, derived classes, virtual overrides
reference to multiple definitions → definitions
unreferenced
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References
gen/lib/Target/AArch64/AArch64GenAsmMatcher.inc13424 { 924 /* decb */, AArch64::DECB_XPiI, Convert__Reg1_0__Tie0_1_1__imm_95_31__imm_95_1, AMFBS_HasSVE, { MCK_GPR64 }, },
13427 { 929 /* decd */, AArch64::DECD_XPiI, Convert__Reg1_0__Tie0_1_1__imm_95_31__imm_95_1, AMFBS_HasSVE, { MCK_GPR64 }, },
13433 { 934 /* dech */, AArch64::DECH_XPiI, Convert__Reg1_0__Tie0_1_1__imm_95_31__imm_95_1, AMFBS_HasSVE, { MCK_GPR64 }, },
13449 { 944 /* decw */, AArch64::DECW_XPiI, Convert__Reg1_0__Tie0_1_1__imm_95_31__imm_95_1, AMFBS_HasSVE, { MCK_GPR64 }, },
14625 { 1794 /* incb */, AArch64::INCB_XPiI, Convert__Reg1_0__Tie0_1_1__imm_95_31__imm_95_1, AMFBS_HasSVE, { MCK_GPR64 }, },
14628 { 1799 /* incd */, AArch64::INCD_XPiI, Convert__Reg1_0__Tie0_1_1__imm_95_31__imm_95_1, AMFBS_HasSVE, { MCK_GPR64 }, },
14634 { 1804 /* inch */, AArch64::INCH_XPiI, Convert__Reg1_0__Tie0_1_1__imm_95_31__imm_95_1, AMFBS_HasSVE, { MCK_GPR64 }, },
14650 { 1814 /* incw */, AArch64::INCW_XPiI, Convert__Reg1_0__Tie0_1_1__imm_95_31__imm_95_1, AMFBS_HasSVE, { MCK_GPR64 }, },
17462 { 4589 /* sqdecb */, AArch64::SQDECB_XPiI, Convert__Reg1_0__Tie0_1_1__imm_95_31__imm_95_1, AMFBS_HasSVE, { MCK_GPR64 }, },
17468 { 4596 /* sqdecd */, AArch64::SQDECD_XPiI, Convert__Reg1_0__Tie0_1_1__imm_95_31__imm_95_1, AMFBS_HasSVE, { MCK_GPR64 }, },
17477 { 4603 /* sqdech */, AArch64::SQDECH_XPiI, Convert__Reg1_0__Tie0_1_1__imm_95_31__imm_95_1, AMFBS_HasSVE, { MCK_GPR64 }, },
17500 { 4617 /* sqdecw */, AArch64::SQDECW_XPiI, Convert__Reg1_0__Tie0_1_1__imm_95_31__imm_95_1, AMFBS_HasSVE, { MCK_GPR64 }, },
17600 { 4757 /* sqincb */, AArch64::SQINCB_XPiI, Convert__Reg1_0__Tie0_1_1__imm_95_31__imm_95_1, AMFBS_HasSVE, { MCK_GPR64 }, },
17606 { 4764 /* sqincd */, AArch64::SQINCD_XPiI, Convert__Reg1_0__Tie0_1_1__imm_95_31__imm_95_1, AMFBS_HasSVE, { MCK_GPR64 }, },
17615 { 4771 /* sqinch */, AArch64::SQINCH_XPiI, Convert__Reg1_0__Tie0_1_1__imm_95_31__imm_95_1, AMFBS_HasSVE, { MCK_GPR64 }, },
17638 { 4785 /* sqincw */, AArch64::SQINCW_XPiI, Convert__Reg1_0__Tie0_1_1__imm_95_31__imm_95_1, AMFBS_HasSVE, { MCK_GPR64 }, },
19505 { 6523 /* uqdecb */, AArch64::UQDECB_WPiI, Convert__Reg1_0__Tie0_1_1__imm_95_31__imm_95_1, AMFBS_HasSVE, { MCK_GPR32 }, },
19506 { 6523 /* uqdecb */, AArch64::UQDECB_XPiI, Convert__Reg1_0__Tie0_1_1__imm_95_31__imm_95_1, AMFBS_HasSVE, { MCK_GPR64 }, },
19511 { 6530 /* uqdecd */, AArch64::UQDECD_WPiI, Convert__Reg1_0__Tie0_1_1__imm_95_31__imm_95_1, AMFBS_HasSVE, { MCK_GPR32 }, },
19512 { 6530 /* uqdecd */, AArch64::UQDECD_XPiI, Convert__Reg1_0__Tie0_1_1__imm_95_31__imm_95_1, AMFBS_HasSVE, { MCK_GPR64 }, },
19520 { 6537 /* uqdech */, AArch64::UQDECH_WPiI, Convert__Reg1_0__Tie0_1_1__imm_95_31__imm_95_1, AMFBS_HasSVE, { MCK_GPR32 }, },
19521 { 6537 /* uqdech */, AArch64::UQDECH_XPiI, Convert__Reg1_0__Tie0_1_1__imm_95_31__imm_95_1, AMFBS_HasSVE, { MCK_GPR64 }, },
19543 { 6551 /* uqdecw */, AArch64::UQDECW_WPiI, Convert__Reg1_0__Tie0_1_1__imm_95_31__imm_95_1, AMFBS_HasSVE, { MCK_GPR32 }, },
19544 { 6551 /* uqdecw */, AArch64::UQDECW_XPiI, Convert__Reg1_0__Tie0_1_1__imm_95_31__imm_95_1, AMFBS_HasSVE, { MCK_GPR64 }, },
19552 { 6558 /* uqincb */, AArch64::UQINCB_WPiI, Convert__Reg1_0__Tie0_1_1__imm_95_31__imm_95_1, AMFBS_HasSVE, { MCK_GPR32 }, },
19553 { 6558 /* uqincb */, AArch64::UQINCB_XPiI, Convert__Reg1_0__Tie0_1_1__imm_95_31__imm_95_1, AMFBS_HasSVE, { MCK_GPR64 }, },
19558 { 6565 /* uqincd */, AArch64::UQINCD_WPiI, Convert__Reg1_0__Tie0_1_1__imm_95_31__imm_95_1, AMFBS_HasSVE, { MCK_GPR32 }, },
19559 { 6565 /* uqincd */, AArch64::UQINCD_XPiI, Convert__Reg1_0__Tie0_1_1__imm_95_31__imm_95_1, AMFBS_HasSVE, { MCK_GPR64 }, },
19567 { 6572 /* uqinch */, AArch64::UQINCH_WPiI, Convert__Reg1_0__Tie0_1_1__imm_95_31__imm_95_1, AMFBS_HasSVE, { MCK_GPR32 }, },
19568 { 6572 /* uqinch */, AArch64::UQINCH_XPiI, Convert__Reg1_0__Tie0_1_1__imm_95_31__imm_95_1, AMFBS_HasSVE, { MCK_GPR64 }, },
19590 { 6586 /* uqincw */, AArch64::UQINCW_WPiI, Convert__Reg1_0__Tie0_1_1__imm_95_31__imm_95_1, AMFBS_HasSVE, { MCK_GPR32 }, },
19591 { 6586 /* uqincw */, AArch64::UQINCW_XPiI, Convert__Reg1_0__Tie0_1_1__imm_95_31__imm_95_1, AMFBS_HasSVE, { MCK_GPR64 }, },
20782 { 924 /* decb */, AArch64::DECB_XPiI, Convert__Reg1_0__Tie0_1_1__imm_95_31__imm_95_1, AMFBS_HasSVE, { MCK_GPR64 }, },
20785 { 929 /* decd */, AArch64::DECD_XPiI, Convert__Reg1_0__Tie0_1_1__imm_95_31__imm_95_1, AMFBS_HasSVE, { MCK_GPR64 }, },
20791 { 934 /* dech */, AArch64::DECH_XPiI, Convert__Reg1_0__Tie0_1_1__imm_95_31__imm_95_1, AMFBS_HasSVE, { MCK_GPR64 }, },
20807 { 944 /* decw */, AArch64::DECW_XPiI, Convert__Reg1_0__Tie0_1_1__imm_95_31__imm_95_1, AMFBS_HasSVE, { MCK_GPR64 }, },
21983 { 1794 /* incb */, AArch64::INCB_XPiI, Convert__Reg1_0__Tie0_1_1__imm_95_31__imm_95_1, AMFBS_HasSVE, { MCK_GPR64 }, },
21986 { 1799 /* incd */, AArch64::INCD_XPiI, Convert__Reg1_0__Tie0_1_1__imm_95_31__imm_95_1, AMFBS_HasSVE, { MCK_GPR64 }, },
21992 { 1804 /* inch */, AArch64::INCH_XPiI, Convert__Reg1_0__Tie0_1_1__imm_95_31__imm_95_1, AMFBS_HasSVE, { MCK_GPR64 }, },
22008 { 1814 /* incw */, AArch64::INCW_XPiI, Convert__Reg1_0__Tie0_1_1__imm_95_31__imm_95_1, AMFBS_HasSVE, { MCK_GPR64 }, },
24820 { 4589 /* sqdecb */, AArch64::SQDECB_XPiI, Convert__Reg1_0__Tie0_1_1__imm_95_31__imm_95_1, AMFBS_HasSVE, { MCK_GPR64 }, },
24826 { 4596 /* sqdecd */, AArch64::SQDECD_XPiI, Convert__Reg1_0__Tie0_1_1__imm_95_31__imm_95_1, AMFBS_HasSVE, { MCK_GPR64 }, },
24835 { 4603 /* sqdech */, AArch64::SQDECH_XPiI, Convert__Reg1_0__Tie0_1_1__imm_95_31__imm_95_1, AMFBS_HasSVE, { MCK_GPR64 }, },
24858 { 4617 /* sqdecw */, AArch64::SQDECW_XPiI, Convert__Reg1_0__Tie0_1_1__imm_95_31__imm_95_1, AMFBS_HasSVE, { MCK_GPR64 }, },
24958 { 4757 /* sqincb */, AArch64::SQINCB_XPiI, Convert__Reg1_0__Tie0_1_1__imm_95_31__imm_95_1, AMFBS_HasSVE, { MCK_GPR64 }, },
24964 { 4764 /* sqincd */, AArch64::SQINCD_XPiI, Convert__Reg1_0__Tie0_1_1__imm_95_31__imm_95_1, AMFBS_HasSVE, { MCK_GPR64 }, },
24973 { 4771 /* sqinch */, AArch64::SQINCH_XPiI, Convert__Reg1_0__Tie0_1_1__imm_95_31__imm_95_1, AMFBS_HasSVE, { MCK_GPR64 }, },
24996 { 4785 /* sqincw */, AArch64::SQINCW_XPiI, Convert__Reg1_0__Tie0_1_1__imm_95_31__imm_95_1, AMFBS_HasSVE, { MCK_GPR64 }, },
26863 { 6523 /* uqdecb */, AArch64::UQDECB_WPiI, Convert__Reg1_0__Tie0_1_1__imm_95_31__imm_95_1, AMFBS_HasSVE, { MCK_GPR32 }, },
26864 { 6523 /* uqdecb */, AArch64::UQDECB_XPiI, Convert__Reg1_0__Tie0_1_1__imm_95_31__imm_95_1, AMFBS_HasSVE, { MCK_GPR64 }, },
26869 { 6530 /* uqdecd */, AArch64::UQDECD_WPiI, Convert__Reg1_0__Tie0_1_1__imm_95_31__imm_95_1, AMFBS_HasSVE, { MCK_GPR32 }, },
26870 { 6530 /* uqdecd */, AArch64::UQDECD_XPiI, Convert__Reg1_0__Tie0_1_1__imm_95_31__imm_95_1, AMFBS_HasSVE, { MCK_GPR64 }, },
26878 { 6537 /* uqdech */, AArch64::UQDECH_WPiI, Convert__Reg1_0__Tie0_1_1__imm_95_31__imm_95_1, AMFBS_HasSVE, { MCK_GPR32 }, },
26879 { 6537 /* uqdech */, AArch64::UQDECH_XPiI, Convert__Reg1_0__Tie0_1_1__imm_95_31__imm_95_1, AMFBS_HasSVE, { MCK_GPR64 }, },
26901 { 6551 /* uqdecw */, AArch64::UQDECW_WPiI, Convert__Reg1_0__Tie0_1_1__imm_95_31__imm_95_1, AMFBS_HasSVE, { MCK_GPR32 }, },
26902 { 6551 /* uqdecw */, AArch64::UQDECW_XPiI, Convert__Reg1_0__Tie0_1_1__imm_95_31__imm_95_1, AMFBS_HasSVE, { MCK_GPR64 }, },
26910 { 6558 /* uqincb */, AArch64::UQINCB_WPiI, Convert__Reg1_0__Tie0_1_1__imm_95_31__imm_95_1, AMFBS_HasSVE, { MCK_GPR32 }, },
26911 { 6558 /* uqincb */, AArch64::UQINCB_XPiI, Convert__Reg1_0__Tie0_1_1__imm_95_31__imm_95_1, AMFBS_HasSVE, { MCK_GPR64 }, },
26916 { 6565 /* uqincd */, AArch64::UQINCD_WPiI, Convert__Reg1_0__Tie0_1_1__imm_95_31__imm_95_1, AMFBS_HasSVE, { MCK_GPR32 }, },
26917 { 6565 /* uqincd */, AArch64::UQINCD_XPiI, Convert__Reg1_0__Tie0_1_1__imm_95_31__imm_95_1, AMFBS_HasSVE, { MCK_GPR64 }, },
26925 { 6572 /* uqinch */, AArch64::UQINCH_WPiI, Convert__Reg1_0__Tie0_1_1__imm_95_31__imm_95_1, AMFBS_HasSVE, { MCK_GPR32 }, },
26926 { 6572 /* uqinch */, AArch64::UQINCH_XPiI, Convert__Reg1_0__Tie0_1_1__imm_95_31__imm_95_1, AMFBS_HasSVE, { MCK_GPR64 }, },
26948 { 6586 /* uqincw */, AArch64::UQINCW_WPiI, Convert__Reg1_0__Tie0_1_1__imm_95_31__imm_95_1, AMFBS_HasSVE, { MCK_GPR32 }, },
26949 { 6586 /* uqincw */, AArch64::UQINCW_XPiI, Convert__Reg1_0__Tie0_1_1__imm_95_31__imm_95_1, AMFBS_HasSVE, { MCK_GPR64 }, },