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reference, declaration → definition
definition → references, declarations, derived classes, virtual overrides
reference to multiple definitions → definitions
unreferenced
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References
gen/lib/Target/AArch64/AArch64GenAsmMatcher.inc12989 { 451 /* cas */, AArch64::CASW, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_3, AMFBS_HasLSE, { MCK_GPR32, MCK_GPR32, MCK__91_, MCK_GPR64sp, MCK__93_ }, },
12990 { 451 /* cas */, AArch64::CASX, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_3, AMFBS_HasLSE, { MCK_GPR64, MCK_GPR64, MCK__91_, MCK_GPR64sp, MCK__93_ }, },
12991 { 455 /* casa */, AArch64::CASAW, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_3, AMFBS_HasLSE, { MCK_GPR32, MCK_GPR32, MCK__91_, MCK_GPR64sp, MCK__93_ }, },
12992 { 455 /* casa */, AArch64::CASAX, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_3, AMFBS_HasLSE, { MCK_GPR64, MCK_GPR64, MCK__91_, MCK_GPR64sp, MCK__93_ }, },
12993 { 460 /* casab */, AArch64::CASAB, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_3, AMFBS_HasLSE, { MCK_GPR32, MCK_GPR32, MCK__91_, MCK_GPR64sp, MCK__93_ }, },
12994 { 466 /* casah */, AArch64::CASAH, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_3, AMFBS_HasLSE, { MCK_GPR32, MCK_GPR32, MCK__91_, MCK_GPR64sp, MCK__93_ }, },
12995 { 472 /* casal */, AArch64::CASALW, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_3, AMFBS_HasLSE, { MCK_GPR32, MCK_GPR32, MCK__91_, MCK_GPR64sp, MCK__93_ }, },
12996 { 472 /* casal */, AArch64::CASALX, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_3, AMFBS_HasLSE, { MCK_GPR64, MCK_GPR64, MCK__91_, MCK_GPR64sp, MCK__93_ }, },
12997 { 478 /* casalb */, AArch64::CASALB, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_3, AMFBS_HasLSE, { MCK_GPR32, MCK_GPR32, MCK__91_, MCK_GPR64sp, MCK__93_ }, },
12998 { 485 /* casalh */, AArch64::CASALH, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_3, AMFBS_HasLSE, { MCK_GPR32, MCK_GPR32, MCK__91_, MCK_GPR64sp, MCK__93_ }, },
12999 { 492 /* casb */, AArch64::CASB, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_3, AMFBS_HasLSE, { MCK_GPR32, MCK_GPR32, MCK__91_, MCK_GPR64sp, MCK__93_ }, },
13000 { 497 /* cash */, AArch64::CASH, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_3, AMFBS_HasLSE, { MCK_GPR32, MCK_GPR32, MCK__91_, MCK_GPR64sp, MCK__93_ }, },
13001 { 502 /* casl */, AArch64::CASLW, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_3, AMFBS_HasLSE, { MCK_GPR32, MCK_GPR32, MCK__91_, MCK_GPR64sp, MCK__93_ }, },
13002 { 502 /* casl */, AArch64::CASLX, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_3, AMFBS_HasLSE, { MCK_GPR64, MCK_GPR64, MCK__91_, MCK_GPR64sp, MCK__93_ }, },
13003 { 507 /* caslb */, AArch64::CASLB, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_3, AMFBS_HasLSE, { MCK_GPR32, MCK_GPR32, MCK__91_, MCK_GPR64sp, MCK__93_ }, },
13004 { 513 /* caslh */, AArch64::CASLH, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_3, AMFBS_HasLSE, { MCK_GPR32, MCK_GPR32, MCK__91_, MCK_GPR64sp, MCK__93_ }, },
20347 { 451 /* cas */, AArch64::CASW, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_3, AMFBS_HasLSE, { MCK_GPR32, MCK_GPR32, MCK__91_, MCK_GPR64sp, MCK__93_ }, },
20348 { 451 /* cas */, AArch64::CASX, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_3, AMFBS_HasLSE, { MCK_GPR64, MCK_GPR64, MCK__91_, MCK_GPR64sp, MCK__93_ }, },
20349 { 455 /* casa */, AArch64::CASAW, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_3, AMFBS_HasLSE, { MCK_GPR32, MCK_GPR32, MCK__91_, MCK_GPR64sp, MCK__93_ }, },
20350 { 455 /* casa */, AArch64::CASAX, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_3, AMFBS_HasLSE, { MCK_GPR64, MCK_GPR64, MCK__91_, MCK_GPR64sp, MCK__93_ }, },
20351 { 460 /* casab */, AArch64::CASAB, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_3, AMFBS_HasLSE, { MCK_GPR32, MCK_GPR32, MCK__91_, MCK_GPR64sp, MCK__93_ }, },
20352 { 466 /* casah */, AArch64::CASAH, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_3, AMFBS_HasLSE, { MCK_GPR32, MCK_GPR32, MCK__91_, MCK_GPR64sp, MCK__93_ }, },
20353 { 472 /* casal */, AArch64::CASALW, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_3, AMFBS_HasLSE, { MCK_GPR32, MCK_GPR32, MCK__91_, MCK_GPR64sp, MCK__93_ }, },
20354 { 472 /* casal */, AArch64::CASALX, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_3, AMFBS_HasLSE, { MCK_GPR64, MCK_GPR64, MCK__91_, MCK_GPR64sp, MCK__93_ }, },
20355 { 478 /* casalb */, AArch64::CASALB, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_3, AMFBS_HasLSE, { MCK_GPR32, MCK_GPR32, MCK__91_, MCK_GPR64sp, MCK__93_ }, },
20356 { 485 /* casalh */, AArch64::CASALH, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_3, AMFBS_HasLSE, { MCK_GPR32, MCK_GPR32, MCK__91_, MCK_GPR64sp, MCK__93_ }, },
20357 { 492 /* casb */, AArch64::CASB, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_3, AMFBS_HasLSE, { MCK_GPR32, MCK_GPR32, MCK__91_, MCK_GPR64sp, MCK__93_ }, },
20358 { 497 /* cash */, AArch64::CASH, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_3, AMFBS_HasLSE, { MCK_GPR32, MCK_GPR32, MCK__91_, MCK_GPR64sp, MCK__93_ }, },
20359 { 502 /* casl */, AArch64::CASLW, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_3, AMFBS_HasLSE, { MCK_GPR32, MCK_GPR32, MCK__91_, MCK_GPR64sp, MCK__93_ }, },
20360 { 502 /* casl */, AArch64::CASLX, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_3, AMFBS_HasLSE, { MCK_GPR64, MCK_GPR64, MCK__91_, MCK_GPR64sp, MCK__93_ }, },
20361 { 507 /* caslb */, AArch64::CASLB, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_3, AMFBS_HasLSE, { MCK_GPR32, MCK_GPR32, MCK__91_, MCK_GPR64sp, MCK__93_ }, },
20362 { 513 /* caslh */, AArch64::CASLH, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_3, AMFBS_HasLSE, { MCK_GPR32, MCK_GPR32, MCK__91_, MCK_GPR64sp, MCK__93_ }, },