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reference, declaration → definition
definition → references, declarations, derived classes, virtual overrides
reference to multiple definitions → definitions
unreferenced
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References
gen/lib/Target/AArch64/AArch64GenAsmMatcher.inc17509 { 4624 /* sqdmlal */, AArch64::SQDMLALi16, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_HasNEON, { MCK_FPR32, MCK_FPR16, MCK_FPR16 }, },
17510 { 4624 /* sqdmlal */, AArch64::SQDMLALi32, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_HasNEON, { MCK_FPR64, MCK_FPR32, MCK_FPR32 }, },
17534 { 4669 /* sqdmlsl */, AArch64::SQDMLSLi16, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_HasNEON, { MCK_FPR32, MCK_FPR16, MCK_FPR16 }, },
17535 { 4669 /* sqdmlsl */, AArch64::SQDMLSLi32, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_HasNEON, { MCK_FPR64, MCK_FPR32, MCK_FPR32 }, },
17668 { 4808 /* sqrdmlah */, AArch64::SQRDMLAHv1i16, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_HasRDM, { MCK_FPR16, MCK_FPR16, MCK_FPR16 }, },
17669 { 4808 /* sqrdmlah */, AArch64::SQRDMLAHv1i32, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_HasRDM, { MCK_FPR32, MCK_FPR32, MCK_FPR32 }, },
17687 { 4817 /* sqrdmlsh */, AArch64::SQRDMLSHv1i16, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_HasRDM, { MCK_FPR16, MCK_FPR16, MCK_FPR16 }, },
17688 { 4817 /* sqrdmlsh */, AArch64::SQRDMLSHv1i32, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_HasRDM, { MCK_FPR32, MCK_FPR32, MCK_FPR32 }, },
24867 { 4624 /* sqdmlal */, AArch64::SQDMLALi16, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_HasNEON, { MCK_FPR32, MCK_FPR16, MCK_FPR16 }, },
24868 { 4624 /* sqdmlal */, AArch64::SQDMLALi32, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_HasNEON, { MCK_FPR64, MCK_FPR32, MCK_FPR32 }, },
24892 { 4669 /* sqdmlsl */, AArch64::SQDMLSLi16, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_HasNEON, { MCK_FPR32, MCK_FPR16, MCK_FPR16 }, },
24893 { 4669 /* sqdmlsl */, AArch64::SQDMLSLi32, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_HasNEON, { MCK_FPR64, MCK_FPR32, MCK_FPR32 }, },
25026 { 4808 /* sqrdmlah */, AArch64::SQRDMLAHv1i16, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_HasRDM, { MCK_FPR16, MCK_FPR16, MCK_FPR16 }, },
25027 { 4808 /* sqrdmlah */, AArch64::SQRDMLAHv1i32, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_HasRDM, { MCK_FPR32, MCK_FPR32, MCK_FPR32 }, },
25045 { 4817 /* sqrdmlsh */, AArch64::SQRDMLSHv1i16, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_HasRDM, { MCK_FPR16, MCK_FPR16, MCK_FPR16 }, },
25046 { 4817 /* sqrdmlsh */, AArch64::SQRDMLSHv1i32, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, AMFBS_HasRDM, { MCK_FPR32, MCK_FPR32, MCK_FPR32 }, },