reference, declaration → definition definition → references, declarations, derived classes, virtual overrides reference to multiple definitions → definitions unreferenced |
12839 { 129 /* andv */, AArch64::ANDV_VPZ_S, Convert__Reg1_0__SVEPredicate3bAnyReg1_1__SVEVectorSReg1_2, AMFBS_HasSVE, { MCK_FPR32, MCK_SVEPredicate3bAnyReg, MCK_SVEVectorSReg }, }, 13539 { 1001 /* eorv */, AArch64::EORV_VPZ_S, Convert__Reg1_0__SVEPredicate3bAnyReg1_1__SVEVectorSReg1_2, AMFBS_HasSVE, { MCK_FPR32, MCK_SVEPredicate3bAnyReg, MCK_SVEVectorSReg }, }, 13648 { 1089 /* faddv */, AArch64::FADDV_VPZ_S, Convert__Reg1_0__SVEPredicate3bAnyReg1_1__SVEVectorSReg1_2, AMFBS_HasSVE, { MCK_FPR32, MCK_SVEPredicate3bAnyReg, MCK_SVEVectorSReg }, }, 14160 { 1395 /* fmaxnmv */, AArch64::FMAXNMV_VPZ_S, Convert__Reg1_0__SVEPredicate3bAnyReg1_1__SVEVectorSReg1_2, AMFBS_HasSVE, { MCK_FPR32, MCK_SVEPredicate3bAnyReg, MCK_SVEVectorSReg }, }, 14177 { 1409 /* fmaxv */, AArch64::FMAXV_VPZ_S, Convert__Reg1_0__SVEPredicate3bAnyReg1_1__SVEVectorSReg1_2, AMFBS_HasSVE, { MCK_FPR32, MCK_SVEPredicate3bAnyReg, MCK_SVEVectorSReg }, }, 14222 { 1435 /* fminnmv */, AArch64::FMINNMV_VPZ_S, Convert__Reg1_0__SVEPredicate3bAnyReg1_1__SVEVectorSReg1_2, AMFBS_HasSVE, { MCK_FPR32, MCK_SVEPredicate3bAnyReg, MCK_SVEVectorSReg }, }, 14239 { 1449 /* fminv */, AArch64::FMINV_VPZ_S, Convert__Reg1_0__SVEPredicate3bAnyReg1_1__SVEVectorSReg1_2, AMFBS_HasSVE, { MCK_FPR32, MCK_SVEPredicate3bAnyReg, MCK_SVEVectorSReg }, }, 14693 { 1842 /* lasta */, AArch64::LASTA_VPZ_S, Convert__Reg1_0__SVEPredicate3bAnyReg1_1__SVEVectorSReg1_2, AMFBS_HasSVE, { MCK_FPR32, MCK_SVEPredicate3bAnyReg, MCK_SVEVectorSReg }, }, 14697 { 1842 /* lasta */, AArch64::LASTA_RPZ_S, Convert__Reg1_0__SVEPredicate3bAnyReg1_1__SVEVectorSReg1_2, AMFBS_HasSVE, { MCK_GPR32, MCK_SVEPredicate3bAnyReg, MCK_SVEVectorSReg }, }, 14701 { 1848 /* lastb */, AArch64::LASTB_VPZ_S, Convert__Reg1_0__SVEPredicate3bAnyReg1_1__SVEVectorSReg1_2, AMFBS_HasSVE, { MCK_FPR32, MCK_SVEPredicate3bAnyReg, MCK_SVEVectorSReg }, }, 14705 { 1848 /* lastb */, AArch64::LASTB_RPZ_S, Convert__Reg1_0__SVEPredicate3bAnyReg1_1__SVEVectorSReg1_2, AMFBS_HasSVE, { MCK_GPR32, MCK_SVEPredicate3bAnyReg, MCK_SVEVectorSReg }, }, 16809 { 3504 /* orv */, AArch64::ORV_VPZ_S, Convert__Reg1_0__SVEPredicate3bAnyReg1_1__SVEVectorSReg1_2, AMFBS_HasSVE, { MCK_FPR32, MCK_SVEPredicate3bAnyReg, MCK_SVEVectorSReg }, }, 17096 { 4048 /* saddv */, AArch64::SADDV_VPZ_S, Convert__Reg1_0__SVEPredicate3bAnyReg1_1__SVEVectorSReg1_2, AMFBS_HasSVE, { MCK_FPR64, MCK_SVEPredicate3bAnyReg, MCK_SVEVectorSReg }, }, 17295 { 4430 /* smaxv */, AArch64::SMAXV_VPZ_S, Convert__Reg1_0__SVEPredicate3bAnyReg1_1__SVEVectorSReg1_2, AMFBS_HasSVE, { MCK_FPR32, MCK_SVEPredicate3bAnyReg, MCK_SVEVectorSReg }, }, 17329 { 4451 /* sminv */, AArch64::SMINV_VPZ_S, Convert__Reg1_0__SVEPredicate3bAnyReg1_1__SVEVectorSReg1_2, AMFBS_HasSVE, { MCK_FPR32, MCK_SVEPredicate3bAnyReg, MCK_SVEVectorSReg }, }, 19248 { 6287 /* uaddv */, AArch64::UADDV_VPZ_S, Convert__Reg1_0__SVEPredicate3bAnyReg1_1__SVEVectorSReg1_2, AMFBS_HasSVE, { MCK_FPR64, MCK_SVEPredicate3bAnyReg, MCK_SVEVectorSReg }, }, 19367 { 6388 /* umaxv */, AArch64::UMAXV_VPZ_S, Convert__Reg1_0__SVEPredicate3bAnyReg1_1__SVEVectorSReg1_2, AMFBS_HasSVE, { MCK_FPR32, MCK_SVEPredicate3bAnyReg, MCK_SVEVectorSReg }, }, 19400 { 6405 /* uminv */, AArch64::UMINV_VPZ_S, Convert__Reg1_0__SVEPredicate3bAnyReg1_1__SVEVectorSReg1_2, AMFBS_HasSVE, { MCK_FPR32, MCK_SVEPredicate3bAnyReg, MCK_SVEVectorSReg }, }, 20197 { 129 /* andv */, AArch64::ANDV_VPZ_S, Convert__Reg1_0__SVEPredicate3bAnyReg1_1__SVEVectorSReg1_2, AMFBS_HasSVE, { MCK_FPR32, MCK_SVEPredicate3bAnyReg, MCK_SVEVectorSReg }, }, 20897 { 1001 /* eorv */, AArch64::EORV_VPZ_S, Convert__Reg1_0__SVEPredicate3bAnyReg1_1__SVEVectorSReg1_2, AMFBS_HasSVE, { MCK_FPR32, MCK_SVEPredicate3bAnyReg, MCK_SVEVectorSReg }, }, 21006 { 1089 /* faddv */, AArch64::FADDV_VPZ_S, Convert__Reg1_0__SVEPredicate3bAnyReg1_1__SVEVectorSReg1_2, AMFBS_HasSVE, { MCK_FPR32, MCK_SVEPredicate3bAnyReg, MCK_SVEVectorSReg }, }, 21519 { 1395 /* fmaxnmv */, AArch64::FMAXNMV_VPZ_S, Convert__Reg1_0__SVEPredicate3bAnyReg1_1__SVEVectorSReg1_2, AMFBS_HasSVE, { MCK_FPR32, MCK_SVEPredicate3bAnyReg, MCK_SVEVectorSReg }, }, 21536 { 1409 /* fmaxv */, AArch64::FMAXV_VPZ_S, Convert__Reg1_0__SVEPredicate3bAnyReg1_1__SVEVectorSReg1_2, AMFBS_HasSVE, { MCK_FPR32, MCK_SVEPredicate3bAnyReg, MCK_SVEVectorSReg }, }, 21581 { 1435 /* fminnmv */, AArch64::FMINNMV_VPZ_S, Convert__Reg1_0__SVEPredicate3bAnyReg1_1__SVEVectorSReg1_2, AMFBS_HasSVE, { MCK_FPR32, MCK_SVEPredicate3bAnyReg, MCK_SVEVectorSReg }, }, 21598 { 1449 /* fminv */, AArch64::FMINV_VPZ_S, Convert__Reg1_0__SVEPredicate3bAnyReg1_1__SVEVectorSReg1_2, AMFBS_HasSVE, { MCK_FPR32, MCK_SVEPredicate3bAnyReg, MCK_SVEVectorSReg }, }, 22051 { 1842 /* lasta */, AArch64::LASTA_VPZ_S, Convert__Reg1_0__SVEPredicate3bAnyReg1_1__SVEVectorSReg1_2, AMFBS_HasSVE, { MCK_FPR32, MCK_SVEPredicate3bAnyReg, MCK_SVEVectorSReg }, }, 22055 { 1842 /* lasta */, AArch64::LASTA_RPZ_S, Convert__Reg1_0__SVEPredicate3bAnyReg1_1__SVEVectorSReg1_2, AMFBS_HasSVE, { MCK_GPR32, MCK_SVEPredicate3bAnyReg, MCK_SVEVectorSReg }, }, 22059 { 1848 /* lastb */, AArch64::LASTB_VPZ_S, Convert__Reg1_0__SVEPredicate3bAnyReg1_1__SVEVectorSReg1_2, AMFBS_HasSVE, { MCK_FPR32, MCK_SVEPredicate3bAnyReg, MCK_SVEVectorSReg }, }, 22063 { 1848 /* lastb */, AArch64::LASTB_RPZ_S, Convert__Reg1_0__SVEPredicate3bAnyReg1_1__SVEVectorSReg1_2, AMFBS_HasSVE, { MCK_GPR32, MCK_SVEPredicate3bAnyReg, MCK_SVEVectorSReg }, }, 24167 { 3504 /* orv */, AArch64::ORV_VPZ_S, Convert__Reg1_0__SVEPredicate3bAnyReg1_1__SVEVectorSReg1_2, AMFBS_HasSVE, { MCK_FPR32, MCK_SVEPredicate3bAnyReg, MCK_SVEVectorSReg }, }, 24454 { 4048 /* saddv */, AArch64::SADDV_VPZ_S, Convert__Reg1_0__SVEPredicate3bAnyReg1_1__SVEVectorSReg1_2, AMFBS_HasSVE, { MCK_FPR64, MCK_SVEPredicate3bAnyReg, MCK_SVEVectorSReg }, }, 24656 { 4430 /* smaxv */, AArch64::SMAXV_VPZ_S, Convert__Reg1_0__SVEPredicate3bAnyReg1_1__SVEVectorSReg1_2, AMFBS_HasSVE, { MCK_FPR32, MCK_SVEPredicate3bAnyReg, MCK_SVEVectorSReg }, }, 24690 { 4451 /* sminv */, AArch64::SMINV_VPZ_S, Convert__Reg1_0__SVEPredicate3bAnyReg1_1__SVEVectorSReg1_2, AMFBS_HasSVE, { MCK_FPR32, MCK_SVEPredicate3bAnyReg, MCK_SVEVectorSReg }, }, 26606 { 6287 /* uaddv */, AArch64::UADDV_VPZ_S, Convert__Reg1_0__SVEPredicate3bAnyReg1_1__SVEVectorSReg1_2, AMFBS_HasSVE, { MCK_FPR64, MCK_SVEPredicate3bAnyReg, MCK_SVEVectorSReg }, }, 26728 { 6388 /* umaxv */, AArch64::UMAXV_VPZ_S, Convert__Reg1_0__SVEPredicate3bAnyReg1_1__SVEVectorSReg1_2, AMFBS_HasSVE, { MCK_FPR32, MCK_SVEPredicate3bAnyReg, MCK_SVEVectorSReg }, }, 26761 { 6405 /* uminv */, AArch64::UMINV_VPZ_S, Convert__Reg1_0__SVEPredicate3bAnyReg1_1__SVEVectorSReg1_2, AMFBS_HasSVE, { MCK_FPR32, MCK_SVEPredicate3bAnyReg, MCK_SVEVectorSReg }, },