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reference, declaration → definition
definition → references, declarations, derived classes, virtual overrides
reference to multiple definitions → definitions
unreferenced
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References
gen/lib/Target/AArch64/AArch64GenAsmMatcher.inc14027 { 1314 /* fcvtzs */, AArch64::FCVTZSh, Convert__Reg1_0__Reg1_1__Imm1_161_2, AMFBS_HasNEON_HasFullFP16, { MCK_FPR16, MCK_FPR16, MCK_Imm1_16 }, },
14062 { 1321 /* fcvtzu */, AArch64::FCVTZUh, Convert__Reg1_0__Reg1_1__Imm1_161_2, AMFBS_HasNEON_HasFullFP16, { MCK_FPR16, MCK_FPR16, MCK_Imm1_16 }, },
17130 { 4110 /* scvtf */, AArch64::SCVTFh, Convert__Reg1_0__Reg1_1__Imm1_161_2, AMFBS_HasNEON_HasFullFP16, { MCK_FPR16, MCK_FPR16, MCK_Imm1_16 }, },
17744 { 4850 /* sqrshrn */, AArch64::SQRSHRNh, Convert__Reg1_0__Reg1_1__Imm1_161_2, AMFBS_HasNEON, { MCK_FPR16, MCK_FPR32, MCK_Imm1_16 }, },
17759 { 4885 /* sqrshrun */, AArch64::SQRSHRUNh, Convert__Reg1_0__Reg1_1__Imm1_161_2, AMFBS_HasNEON, { MCK_FPR16, MCK_FPR32, MCK_Imm1_16 }, },
17823 { 4944 /* sqshrn */, AArch64::SQSHRNh, Convert__Reg1_0__Reg1_1__Imm1_161_2, AMFBS_HasNEON, { MCK_FPR16, MCK_FPR32, MCK_Imm1_16 }, },
17838 { 4975 /* sqshrun */, AArch64::SQSHRUNh, Convert__Reg1_0__Reg1_1__Imm1_161_2, AMFBS_HasNEON, { MCK_FPR16, MCK_FPR32, MCK_Imm1_16 }, },
19274 { 6325 /* ucvtf */, AArch64::UCVTFh, Convert__Reg1_0__Reg1_1__Imm1_161_2, AMFBS_HasNEON_HasFullFP16, { MCK_FPR16, MCK_FPR16, MCK_Imm1_16 }, },
19618 { 6608 /* uqrshrn */, AArch64::UQRSHRNh, Convert__Reg1_0__Reg1_1__Imm1_161_2, AMFBS_HasNEON, { MCK_FPR16, MCK_FPR32, MCK_Imm1_16 }, },
19667 { 6656 /* uqshrn */, AArch64::UQSHRNh, Convert__Reg1_0__Reg1_1__Imm1_161_2, AMFBS_HasNEON, { MCK_FPR16, MCK_FPR32, MCK_Imm1_16 }, },
21390 { 1314 /* fcvtzs */, AArch64::FCVTZSh, Convert__Reg1_0__Reg1_1__Imm1_161_2, AMFBS_HasNEON_HasFullFP16, { MCK_FPR16, MCK_FPR16, MCK_Imm1_16 }, },
21425 { 1321 /* fcvtzu */, AArch64::FCVTZUh, Convert__Reg1_0__Reg1_1__Imm1_161_2, AMFBS_HasNEON_HasFullFP16, { MCK_FPR16, MCK_FPR16, MCK_Imm1_16 }, },
24493 { 4110 /* scvtf */, AArch64::SCVTFh, Convert__Reg1_0__Reg1_1__Imm1_161_2, AMFBS_HasNEON_HasFullFP16, { MCK_FPR16, MCK_FPR16, MCK_Imm1_16 }, },
25102 { 4850 /* sqrshrn */, AArch64::SQRSHRNh, Convert__Reg1_0__Reg1_1__Imm1_161_2, AMFBS_HasNEON, { MCK_FPR16, MCK_FPR32, MCK_Imm1_16 }, },
25117 { 4885 /* sqrshrun */, AArch64::SQRSHRUNh, Convert__Reg1_0__Reg1_1__Imm1_161_2, AMFBS_HasNEON, { MCK_FPR16, MCK_FPR32, MCK_Imm1_16 }, },
25181 { 4944 /* sqshrn */, AArch64::SQSHRNh, Convert__Reg1_0__Reg1_1__Imm1_161_2, AMFBS_HasNEON, { MCK_FPR16, MCK_FPR32, MCK_Imm1_16 }, },
25196 { 4975 /* sqshrun */, AArch64::SQSHRUNh, Convert__Reg1_0__Reg1_1__Imm1_161_2, AMFBS_HasNEON, { MCK_FPR16, MCK_FPR32, MCK_Imm1_16 }, },
26637 { 6325 /* ucvtf */, AArch64::UCVTFh, Convert__Reg1_0__Reg1_1__Imm1_161_2, AMFBS_HasNEON_HasFullFP16, { MCK_FPR16, MCK_FPR16, MCK_Imm1_16 }, },
26976 { 6608 /* uqrshrn */, AArch64::UQRSHRNh, Convert__Reg1_0__Reg1_1__Imm1_161_2, AMFBS_HasNEON, { MCK_FPR16, MCK_FPR32, MCK_Imm1_16 }, },
27025 { 6656 /* uqshrn */, AArch64::UQSHRNh, Convert__Reg1_0__Reg1_1__Imm1_161_2, AMFBS_HasNEON, { MCK_FPR16, MCK_FPR32, MCK_Imm1_16 }, },