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reference, declaration → definition
definition → references, declarations, derived classes, virtual overrides
reference to multiple definitions → definitions
unreferenced
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References
gen/lib/Target/AArch64/AArch64GenAsmMatcher.inc12802 { 97 /* aesd */, AArch64::AESD_ZZZ_B, Convert__SVEVectorBReg1_0__Tie0_1_2__SVEVectorBReg1_2, AMFBS_HasSVE2AES, { MCK_SVEVectorBReg, MCK_SVEVectorBReg, MCK_SVEVectorBReg }, },
12804 { 102 /* aese */, AArch64::AESE_ZZZ_B, Convert__SVEVectorBReg1_0__Tie0_1_2__SVEVectorBReg1_2, AMFBS_HasSVE2AES, { MCK_SVEVectorBReg, MCK_SVEVectorBReg, MCK_SVEVectorBReg }, },
12806 { 107 /* aesimc */, AArch64::AESIMC_ZZ_B, Convert__SVEVectorBReg1_0__Tie0_1_2, AMFBS_HasSVE2AES, { MCK_SVEVectorBReg, MCK_SVEVectorBReg }, },
12808 { 114 /* aesmc */, AArch64::AESMC_ZZ_B, Convert__SVEVectorBReg1_0__Tie0_1_2, AMFBS_HasSVE2AES, { MCK_SVEVectorBReg, MCK_SVEVectorBReg }, },
16836 { 3648 /* pmullb */, AArch64::PMULLB_ZZZ_Q, Convert__SVEVectorQReg1_0__SVEVectorDReg1_1__SVEVectorDReg1_2, AMFBS_HasSVE2AES, { MCK_SVEVectorQReg, MCK_SVEVectorDReg, MCK_SVEVectorDReg }, },
16839 { 3655 /* pmullt */, AArch64::PMULLT_ZZZ_Q, Convert__SVEVectorQReg1_0__SVEVectorDReg1_1__SVEVectorDReg1_2, AMFBS_HasSVE2AES, { MCK_SVEVectorQReg, MCK_SVEVectorDReg, MCK_SVEVectorDReg }, },
20161 { 97 /* aesd */, AArch64::AESD_ZZZ_B, Convert__SVEVectorBReg1_0__Tie0_1_2__SVEVectorBReg1_2, AMFBS_HasSVE2AES, { MCK_SVEVectorBReg, MCK_SVEVectorBReg, MCK_SVEVectorBReg }, },
20163 { 102 /* aese */, AArch64::AESE_ZZZ_B, Convert__SVEVectorBReg1_0__Tie0_1_2__SVEVectorBReg1_2, AMFBS_HasSVE2AES, { MCK_SVEVectorBReg, MCK_SVEVectorBReg, MCK_SVEVectorBReg }, },
20164 { 107 /* aesimc */, AArch64::AESIMC_ZZ_B, Convert__SVEVectorBReg1_0__Tie0_1_2, AMFBS_HasSVE2AES, { MCK_SVEVectorBReg, MCK_SVEVectorBReg }, },
20166 { 114 /* aesmc */, AArch64::AESMC_ZZ_B, Convert__SVEVectorBReg1_0__Tie0_1_2, AMFBS_HasSVE2AES, { MCK_SVEVectorBReg, MCK_SVEVectorBReg }, },
24194 { 3648 /* pmullb */, AArch64::PMULLB_ZZZ_Q, Convert__SVEVectorQReg1_0__SVEVectorDReg1_1__SVEVectorDReg1_2, AMFBS_HasSVE2AES, { MCK_SVEVectorQReg, MCK_SVEVectorDReg, MCK_SVEVectorDReg }, },
24197 { 3655 /* pmullt */, AArch64::PMULLT_ZZZ_Q, Convert__SVEVectorQReg1_0__SVEVectorDReg1_1__SVEVectorDReg1_2, AMFBS_HasSVE2AES, { MCK_SVEVectorQReg, MCK_SVEVectorDReg, MCK_SVEVectorDReg }, },
27816 { 97 /* aesd */, 7 /* 0, 1, 2 */, MCK_SVEVectorBReg, AMFBS_HasSVE2AES },
27817 { 97 /* aesd */, 7 /* 0, 1, 2 */, MCK_SVEVectorBReg, AMFBS_HasSVE2AES },
27818 { 102 /* aese */, 7 /* 0, 1, 2 */, MCK_SVEVectorBReg, AMFBS_HasSVE2AES },
27819 { 102 /* aese */, 7 /* 0, 1, 2 */, MCK_SVEVectorBReg, AMFBS_HasSVE2AES },
27820 { 107 /* aesimc */, 3 /* 0, 1 */, MCK_SVEVectorBReg, AMFBS_HasSVE2AES },
27821 { 107 /* aesimc */, 3 /* 0, 1 */, MCK_SVEVectorBReg, AMFBS_HasSVE2AES },
27822 { 114 /* aesmc */, 3 /* 0, 1 */, MCK_SVEVectorBReg, AMFBS_HasSVE2AES },
27823 { 114 /* aesmc */, 3 /* 0, 1 */, MCK_SVEVectorBReg, AMFBS_HasSVE2AES },
35364 { 3648 /* pmullb */, 1 /* 0 */, MCK_SVEVectorQReg, AMFBS_HasSVE2AES },
35365 { 3648 /* pmullb */, 6 /* 1, 2 */, MCK_SVEVectorDReg, AMFBS_HasSVE2AES },
35366 { 3648 /* pmullb */, 1 /* 0 */, MCK_SVEVectorQReg, AMFBS_HasSVE2AES },
35367 { 3648 /* pmullb */, 6 /* 1, 2 */, MCK_SVEVectorDReg, AMFBS_HasSVE2AES },
35376 { 3655 /* pmullt */, 1 /* 0 */, MCK_SVEVectorQReg, AMFBS_HasSVE2AES },
35377 { 3655 /* pmullt */, 6 /* 1, 2 */, MCK_SVEVectorDReg, AMFBS_HasSVE2AES },
35378 { 3655 /* pmullt */, 1 /* 0 */, MCK_SVEVectorQReg, AMFBS_HasSVE2AES },
35379 { 3655 /* pmullt */, 6 /* 1, 2 */, MCK_SVEVectorDReg, AMFBS_HasSVE2AES },